Agilent Technologiesメーカー16750Aの使用説明書/サービス説明書
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Agilent T echnologies 16750A/B Logic Analyzer Help V olume © 1992- 2002 Agi lent T echnologie s. All rights reserved ..
2 Agilent T echnologies 16750A/B Logic Analyzer The Agile nt T ec hnologies 16750 A/B 400 MHz State/2 GHz Ti ming Zoom logic analyzer offe rs 4M deep memory and very fast sample rates - up to 2 GHz for areas around the trig ger - with up to 34 0 channels.
3 Agilent T echnologi es 16750A/B Logic Anal yz er • “Ru nning Measur ements” on p age 86 • “Displayi ng Capture d Data” on page 88 • “Usin g Symbo ls” on pag e 95 • “Printing/Ex.
4 Agilent T echnologie s 16750A/B Logic Analyzer.
5 Contents Agilent Technologies 167 50A/B Logic Analyzer 1 Getting Started Step 1. Connect the logic analyzer to the device under test 13 Step 2. C hoose t he sampling mode 14 Step 3. For mat labels for the probed sig nals 17 Step 4. Define the trigger condi t ion 20 Step 5.
6 Contents To select t ransitional timing or st ore qualified 37 More on Store Q ualificat ion in Tra nsitional Timing 38 More on Storing Transitions 38 Transition al Timing Considerati ons 39 Selec t.
Contents 7 Using Sy mbols 9 5 To load object file sy mbols 96 To adjust symbol values for relocated code 97 To crea te user -def ined sy mbols 9 8 To ente r symbo lic lab el val ues 99 To create an AS CII symbol fi le 100 To cr eate a rea ders.
8 Contents Importing Netlist a nd ASCII Files 121 Exporting ASCII File s 123 Importing A SCII Files 123 Terminati on Adapt er 125 E5346A H igh Den sity Adap ter 126 Mappin g Conn ector N ames 127 Impo.
Contents 9 Error Messag es 1 7 0 Must a ssign Pod 1 on the mas ter card to specify actions f or flags 171 Branch expr ession is too com plex 171 Cannot speci fy range on labe l with clock bits that sp.
10 Contents 4 Concepts Understandin g Logic Analyzer Tri ggering 1 92 The Conve yor Belt Analogy 19 2 Summary of Trigge ring Capabi lities 19 4 Seque nce Leve ls 194 Boolean E xpressi ons 197 Branches.
11 1 Gett ing Starte d After you have connected the logic analyzer probes to your device under test (see “Step 1. C onnect the logic analy z er to the device und er test” on page 13), any measurem.
12 Chapter 1: Getting St arted • “Step 2. Choos e the samp ling m ode” on page 1 4 • “Step 3. Forma t labe ls for th e pro bed s ignal s” o n page 17 • “Step 4. De fine t he t rigger condi tion” on p age 20 • “Step 5. Run the m easur ement” on page 2 1 • “Step 6.
13 Chapte r 1: Gettin g Started Step 1. Connect the logic ana lyzer to t he device un der test Step 1. Connect the logic ana lyzer to the device under test Before you begin setting up the logic analyzer f or a measurement, you need to physically con nect the logic analyzer to you r device under test.
14 Chapter 1: Getting St arted Step 2. Choo se t he sampl ing mode Step 2. Choose the sampling mode There are two logic analyzer sampling modes to choose f rom: tim in g mode and state mode . In timing mode , the logic analyzer samples asynchronou sly , based on an internal sampling clock signal.
15 Chapte r 1: Gettin g Started Step 2. Choo se t he sampl ing mode If you chose T iming Mode 1. Se lect the timin g analyzer full/half channel configura tion. T ypically , you can choos e a half-c hannel co nfigura tion w ith fast er samp ling an d gr eater memory dep th, but with half of th e cha nnels .
16 Chapter 1: Getting St arted Step 2. Choo se t he sampl ing mode Y ou can also specify clock input signal levels (from the dev ice under test) that wil l enab le (qual ify) th e samp ling clo ck. In either sampling mode 1. Specify the tr igger positi on.
17 Chapte r 1: Gettin g Started Step 3. Format labels for the pro bed signals Step 3. Format labels for the probed signals When a logic analy zer probes hundreds of si gnals in a device under test, you need to be able to give t hose channels m o re meaningf ul names t han "pod 1, channel 1" .
18 Chapter 1: Getting St arted Step 3. Forma t labels fo r the probed signals T o assign pods to one or two logic analyzers A logic analyzer's pod pai rs can be assigned to one or two separate logic analyzers or they can be left unassigned. 1. In the F ormat tab, sele ct the Pod Assignment bu tton.
19 Chapte r 1: Gettin g Started Step 3. Format labels for the pro bed signals T o assign names t o logic ana l yzer ch annels 1. Sele ct a labe l butto n, and ei ther: • Cho o se th e Rename co mmand, enter th e labe l name , and se lect th e OK button.
20 Chapter 1: Getting St arted Step 4. Defin e the trig ger conditio n Step 4. Define the trig ger condition The trigger is the event in the d evice under test that you want to capture data around.
21 Chapte r 1: Gettin g Started Step 5. Ru n the me asurem ent Step 5. Run the measurement Once the trigg er condition has been defined, you can run the measurement. 1. Select th e Run Single button . When you run a measu r emen t, the Stop butto n becomes a vailabl e while the lo gic anal yzer looks for the t rigger condi tion.
22 Chapter 1: Getting St arted Step 6. Displa y the capt ured data Step 6. Display the capt ured data Once you have run a m easurement and fill ed the logic analyzer's acquisition memory with captured data, you can displ ay it with one of the display tool s.
23 Chapte r 1: Gettin g Started Step 6. Display the c aptured data 3. Drag th e display tool ic on and d rop it on the analyzer ic on. 4. T o open the displ ay tool, select it s icon an d ch oose the Displ ay command. Next: “For More Information. ..
24 Chapter 1: Getting St arted For More Informa tion... For More Information... On mak ing measure ments on the demo cou nter board: • “Examp le: T i ming measurem ent on counter board” on page .
25 Chapte r 1: Gettin g Started For More Informa tion... help v olume ) • Usin g the Compare Analys is T ool (see the Compa re T ool help volume).
26 Chapter 1: Getting St arted Example : T iming measure m ent on cou nter board Example: T iming measurem ent on counter board This example u ses the demo coun t er board that is supplied with the Making B asic Measur ements k it as the de vice under test.
27 Chapte r 1: Gettin g Started Example: T i ming measur ement on counter boar d T o ru n the me asur emen t 1. Select th e Run Single button. T o display the captured dat a 1. From the W i ndow menu, select yo ur logi c anal yzer and cho ose the Wa v e fo rm comman d .
28 Chapter 1: Getting St arted Example : State m easurement on counter b oard Example: State measurement on counter board This example u ses the demo coun t er board that is supplied with the Making B asic Measur ements k it as the de vice under test.
29 Chapte r 1: Gettin g Started Example : State measur ement on counter boar d T o ru n the me asur emen t 1. Select th e Run Single button. T o display the captured dat a 1. From the Wi n dow menu, select you r logic analyzer and choos e the Lis tin g command.
30 Chapter 1: Getting St arted Example : State m easurement on counter b oard.
31 2 Ta s k G u i d e • “Pro bing t he Device Un der T est” on p age 33 • “Cho osing the Samp ling Mode” o n pag e 36 • “ Sele cting the T iming M ode (Asy nchron ous Samp ling)” on .
32 Chapter 2: T ask Guide • “Selectin g the State Mod e (Synchron ous Sampli ng)” on page 43 • “In Either Timing Mode or State Mode ” on page 52 • “Using 2 GHz T im ing Zoom” on page.
33 Chapter 2: T ask Guide Probing t he Device Under T est Probing the Device Under T est The figures below shows a variety of simple probing con nections. The specific p robe type, number of probes, and locati o n on the device under test circuit d epends on your particular measure m ent.
34 Chapter 2: T ask Guide Probing t he Device Under T est Adapte r-to- Board Connec tion Both the 01650- 63203 and t he E5346A ada pters in clude termin ation for the logic analyzer . The 01650-632 03 termination adapter plugs into a 2 x 10 pin header with 0 .
35 Chapter 2: T ask Guide Probing t he Device Under T est correctly , and may include an in verse assembler . The circuit board provides access to logical groups of pins through headers designed to connect directly to the lo gic analy zer .
36 Chapter 2: T ask Guide Choos ing the Sa mplin g Mode Choosing the Sampling Mode There are two logic analyzer sampling modes to choose f rom: tim in g mode and state mode . In timing mode , the logic analyzer samples asynchronou sly , based on an internal sampling clock signal.
37 Chapter 2: T ask Guide T o select transitional tim ing or st ore qualifi ed T o select transitional timing or store qualified 1. In the Sampli ng tab wi th T iming Mod e selected , select t he T ransitiona l T iming with Sto re Qualification configuration.
38 Chapter 2: T ask Guide T o select transitional timing or store qualifie d More on Store Qual ification in T ransitional Ti m i n g When Tr a n s i t i o n s is selected on the Defa ult Stor ing subtab, the default store quali fication is setup to store data on all channels if an edge/transition occur s on any one channel.
39 Chapter 2: T ask Guide T o select transitional tim ing or st ore qualifi ed happen at this rate, two samples are stored (fo ur at the fastest rate of 2.5 ns) f or every transition. Therefore, with 2 K samples of memor y , 1 K of transitio ns are stored.
40 Chapter 2: T ask Guide T o select transitional timing or store qualifie d Sequen ce level branching In transitional timing, only 2 branch es are available per sequence leve l. Global cou nters In transitional timing, only one g lo bal counter is available.
41 Chapter 2: T ask Guide T o select transitional tim ing or st ore qualifi ed 2. Selec t the Samp ling tab . 3. Choose t he T i ming Mo de opti on. Y ou can also select the tim i ng sampli ng mode in the “Pod Assig nment Dialog” on pa ge 13 0. T o select the full/ha lf channel configurat ion 1.
42 Chapter 2: T ask Guide T o select transitional timing or store qualifie d NOTE: When the Sam ple Pe riod is 1.25 ns, data is acq uired at fo ur time s the trig ger sequencer rate.
43 Chapter 2: T ask Guide T o select transitional tim ing or st ore qualifi ed Selecting the S tate Mode ( Synchronous Sampling) In state mode , the logic analyzer sam ples synchron o usly , based on a sampling clo ck signal (or signal s) from the device unde r test.
44 Chapter 2: T ask Guide T o select transitional timing or store qualifie d T o select the stat e mode 1. Open the logic analyze r Setup w indow . 2. Selec t the Samp ling tab . 3. Choose t he State Mode o ption. Y ou can also select the state sampling mode in the “Pod Assignment Dialog” on pa ge 13 0.
45 Chapter 2: T ask Guide T o select transitional tim ing or st ore qualifi ed saved into one sample o f logic anal yzer memory . T wo additional sam pling clock modes let you capture data differently: •I n t h e Mast er/Slave mode, you can save data captu red on different clock edge s into the same sam ple of l ogic analyz er m emo ry .
46 Chapter 2: T ask Guide T o select transitional timing or store qualifie d T o set up the master/ slave sampling clock mo de 1. In the Samp ling ta b, with State Mode sel ected, select the Master/S lave mode in th e Clock Setup are a.
47 Chapter 2: T ask Guide T o select transitional tim ing or st ore qualifi ed See Also “T o change th e sampling clock mode ” on page 44 T o automatica lly adjust sa mpling posit ions When adjust.
48 Chapter 2: T ask Guide T o select transitional timing or store qualifie d The Use demo data (no probes req uired) o ption is fo r dem onstrat ion purposes onl y .
49 Chapter 2: T ask Guide T o select transitional tim ing or st ore qualifi ed To v i e w eye finder data as a bus comp o site When you want a compressed, high-le vel view of the eye finder data: 1. In the E ye Finde r Resul ts tab, select the label b utton and choose the Vie w as Bus Composite command.
50 Chapter 2: T ask Guide T o select transitional timing or store qualifie d 2. In the fi le brow ser dialo g, nam e the file to be save d or selec t the file to be load ed. For more information on save/load messages, see “Eye Finder Load/S ave Messages ” on page 141.
51 Chapter 2: T ask Guide T o select transitional tim ing or st ore qualifi ed setup time is the front edge of the setup/hold window relative to the sampling clo ck, and the hold t ime is the back edge of the se t up/hold window relat ive to the sampling cloc k.
52 Chapter 2: T ask Guide T o select transitional timing or store qualifie d (The actual sampl ing position is in the middle of the setup/h o ld window .
53 Chapter 2: T ask Guide T o select transitional tim ing or st ore qualifi ed not look for a trigger until the specified per centage of pretrigger data has been stor ed. After a trigger has been detected, the specif ied percentage of postt rigger data is stored befor e the analyzer halts.
54 Chapter 2: T ask Guide T o select transitional timing or store qualifie d 2. In the An alyzer Shut down Option s dialog, ch oose eith er: • Soft -- This will leave the logic analyzer window but turn off mos t options. • Hard - - This wil l remove the logi c anal yzer and its disp lay tool s from the W orkspace.
55 Chapter 2: T ask Guide T o select transitional tim ing or st ore qualifi ed 1. In the Sampl ing tab, sele ct the T im ing Zoom button. 2. In the T im ing Zoom c ontrols dialog, s elect the O n/Off che ckbox. T o set the T iming Zoom trigge r position 1.
56 Chapter 2: T ask Guide T o select transitional timing or store qualifie d T o specify which analyzer has T iming Zoom NOTE: If you have both analyzers of the module turn ed on , you need to specify w hich analyzer you want to u se T iming Zoom with.
57 Chapter 2: T ask Guide Formatt ing Labels for Logic Analyzer Probes Formatting Labels for Logic Analyz er Probes The Format tab i s m ainly fo r assigning b us and si gnal names (from the device under test) to logic analyzer channels. The se names are called labels.
58 Chapter 2: T ask Guide Formatt ing Labels for Logic Analyzer Probes When using a multi-card l o gic analyzer : • When both analyze rs are turned on, pods 1/2 and 3/4 of the maste r card canno t be a ssigned to the same a n alyzer .
59 Chapter 2: T ask Guide Formatt ing Labels for Logic Analyzer Probes • L VCM OS 1. 5v -- The t hres hold level is +0 .75 volts . • L VCM OS 1. 8v -- The t hres hold level is +0 .90 volts . • L VCM OS 2. 5v -- The t hres hold level is +1 .25 volts .
60 Chapter 2: T ask Guide Formatt ing Labels for Logic Analyzer Probes • Or , ch oos e the Insert b efore or Inse rt a fter command, e nter the label name, and select the OK butto n. 2. In the lab el row , selec t the butto n of the pod th at contai ns the ch annels you want to assign .
61 Chapter 2: T ask Guide Formatt ing Labels for Logic Analyzer Probes “T o t urn lab els off or on” on page 62 “T o ch ange the la bel pol arity” o n page 61 T o change the label polarity Whi.
62 Chapter 2: T ask Guide Formatt ing Labels for Logic Analyzer Probes 3. In the Change Bit O r der dialog: • T o reorde r the bits indi vidually , ente r the bit tha t the probe channel should be mapp ed to. • T o swap the high and low order bytes or words, select the button Big Endian to L ittle Endia n at t he b ottom of t he d ialog .
63 Chapter 2: T ask Guide Formatt ing Labels for Logic Analyzer Probes The lab el's dat a appe ars in the dis play wi ndows..
64 Chapter 2: T ask Guide Setti ng Up T rigge rs and Runn ing Measuremen ts Setting Up T riggers and Running Measurements The following information is a ge neric discussion about trigg ering in logic analyz ers. Depending on the logic analyz er type, and the stat e or timing mode being used, some functionali ty may not be available.
65 Chapter 2: T ask Guide Settin g Up T riggers an d Running M easurements sequence levels, t he questio n about what to do with the capt ured dat a samples. Of course, sometimes it's useful to specify sto rage qualifier s at certain levels in t he trigger sequence.
66 Chapter 2: T ask Guide Setti ng Up T rigge rs and Runn ing Measuremen ts and optio ns. T o sp ecify a label pattern ev ent Label pattern events let you speci fy patterns or ranges on a bus. 1. Selec t the la bel n ame but ton and c hoose th e lab el that y ou wa nt to loo k for a pattern on.
67 Chapter 2: T ask Guide Settin g Up T riggers an d Running M easurements edge event s are only available in certain timing mode t rigge r functions. 1. Selec t the la bel n ame but ton and c hoose th e lab el that y ou wa nt to loo k for a pattern on.
68 Chapter 2: T ask Guide Setti ng Up T rigge rs and Runn ing Measuremen ts T o expand a trigger func tion 1. In the T rigger tab, selec t the number but ton of the trigger sequ ence level who se trigge r functi on you wa nt to exp and. 2. Choose Ex pand function .
69 Chapter 2: T ask Guide Settin g Up T riggers an d Running M easurements • Inser t and break down tri gger funct ions fro m the loa ded lib rary ju st like norma l trigger fu nctions .
70 Chapter 2: T ask Guide Setti ng Up T rigge rs and Runn ing Measuremen ts Using State Mode T rigger Features When the logic analyzer sampling mode is state , you can spe cify whether a state or time c ount is stored with samples and you can set up the default storing options.
71 Chapter 2: T ask Guide Settin g Up T riggers an d Running M easurements T o Specify Default Storing Y ou can set up default storing so that o nly the data samples you're interested in are saved in logic analyzer ac quisition memory . NOTE: Default storing in both s tate and ti ming modes requi re tim e tags to recons truct th e data.
72 Chapter 2: T ask Guide Setti ng Up T rigge rs and Runn ing Measuremen ts "Branches taken" feature of past logic analyzers. T he best way to store only the states that cause se quence leve.
73 Chapter 2: T ask Guide Settin g Up T riggers an d Running M easurements that follo w one another , you need to use multiple levels in the trigg er sequence. For example, mul t iple le vels in the trigger sequence let you trigger o n a particular function calling se q uence or capture only the execution within a parti cular program loop.
74 Chapter 2: T ask Guide Setti ng Up T rigge rs and Runn ing Measuremen ts inse rt. A pictu re des cribing t he tri gger funct ion is shown. 3. Sele ct the Replace button, or select the level button and choo se Replace LEVEL . T o delete seque nce levels 1.
75 Chapter 2: T ask Guide Settin g Up T riggers an d Running M easurements trigge r act ion y ou wa nt t o spe cify . A yellow box appears around the level. 2. Select the T rigge r or Goto button and choos e the appropriat e Goto or T rigger act ion. 3.
76 Chapter 2: T ask Guide Setti ng Up T rigge rs and Runn ing Measuremen ts 4. In the E-ma il Setup di alog, en ter the name of the SMTP (see page 76) ma il server (if you don't know this , conta.
77 Chapter 2: T ask Guide Settin g Up T riggers an d Running M easurements the pr otocol. On the I nternet, there are t he follo wing TCP/IP protocol s: • TCP (T ransmi ssion Control P rotocol), w hich u ses a s et of rules to exchan ge messa ges wi th other Internet p oints at t he infor mation p acket leve l.
78 Chapter 2: T ask Guide Setti ng Up T rigge rs and Runn ing Measuremen ts Editing Adva nced T ri gger Functions After you break down a trigger function ( if it didn't quite provide the trigger capability you nee d), or after you select one of the advanced trigger functions, you' re ready to edit t he advanced trigger functio n.
79 Chapter 2: T ask Guide Settin g Up T riggers an d Running M easurements 2. Enter a t ime duration value. The event must be present for t he specified period of time before t he action is taken. T o specify a < duration, b reak down t he Find pattern present for < duration trigger function.
80 Chapter 2: T ask Guide Setti ng Up T rigge rs and Runn ing Measuremen ts zero), st op (and re set), pause, or resume a tim er . Y o u can in sert timer events in a different sequence level t o test the v alue of a timer . NOTE: No time r is avail able fo r the first pod p air assig ned to a logic analyzer .
81 Chapter 2: T ask Guide Settin g Up T riggers an d Running M easurements and choose ei ther Reset or Inc re men t . T o i nsert a cou nter event Counter events are like other events in that they eval uate to either true or fa lse.
82 Chapter 2: T ask Guide Setti ng Up T rigge rs and Runn ing Measuremen ts Flags can also be used to drive the logic analysis system's Port O ut signal. T o inser t a flag action Y ou can use the Set/clear/pulse fla g trigger function to insert a flag action.
83 Chapter 2: T ask Guide Settin g Up T riggers an d Running M easurements choose t o insert or replace a Flag . 2. Select the flag number button and choos e the number of the flag you want to test. 3. Select w hether yo u're t esting if the flag i s Set or Clear .
84 Chapter 2: T ask Guide Setti ng Up T rigge rs and Runn ing Measuremen ts event list, you can specify their eval uation order by grouping the events. 1. In the T ri gger ta b's T rig ger Seq uence ar ea, sele ct the If , If not , Else if , or Else i f not but ton, and c hoose Group events .
85 Chapter 2: T ask Guide Settin g Up T riggers an d Running M easurements Saving/R ecalling T r igger Setups Y ou can save a trigger setup within a session by using trigger save/ recall.
86 Chapter 2: T ask Guide Setti ng Up T rigge rs and Runn ing Measuremen ts Running Meas urements After you set up a trigger , you're ready to run the logic analy zer measurement.
87 Chapter 2: T ask Guide Settin g Up T riggers an d Running M easurements logi c ana lyze r is s till runnin g. • Messages such as "W aiting in level 1" may indicate you nee d to refine your trigge r . • If the sta tus shows as "Stopp ed", the analy zer ei ther fini shed the acqui sition, or w as una ble to run.
88 Chapter 2: T ask Guide Displayi ng Captured Dat a Displaying Captured Data Once you have run a m easurement and fill ed the logic analyzer's acquisition memory with captured data, you can display the captur ed data with one of the displ ay tools.
89 Chapter 2: T ask Guide Displaying Capture d Data W aveform and Listing (and othe r) display tools provide gl obal markers that can be used to correlate data that is captur ed by different instrumen t modules o r displayed differently i n other display tool windows.
90 Chapter 2: T ask Guide Displayi ng Captured Dat a • In W av eform displa ys, Timing Zo om an d the regul ar dat a ar e in d iffer ent windows. T o view t hem together , select Edit -> Insert from t he menu bar . • In W aveform display s, if Timing Zoom and regular d ata do not correspo nd, check tha t the dis play is set to Seconds/ div .
91 Chapter 2: T ask Guide Displaying Capture d Data time. For example , if you use storage qualif ication (in the state sampling mo de) or the Pattern Filter analysis tool, you can chart variable values. Y ou can use the Distribution display tool to show how of t en differen t values (among the possible values) are capt ured on a label.
92 Chapter 2: T ask Guide Displayi ng Captured Dat a If the captured dat a doesn't look correct Intermittent Data Errors Check for poor connections, incorrect signal leve ls on the hardware, incorrect lo gic levels under the l ogic analyzer's Config tab, or marginal timing for signals.
93 Chapter 2: T ask Guide Displaying Capture d Data Since acquisiti on memory is cleared at the beg inning of a measurement, sto pping a run may create a discrepancy between acquisition memory and the m emory buffer of connected tools.
94 Chapter 2: T ask Guide Displayi ng Captured Dat a • Sel ect the OK button . The sym bolic na mes for th e values now appea r in the ov erlaid b us waveform. T o view sym bolic values in a listin g display 1. Sele ct the num eric ba se of th e label w here yo u want to di splay symbo lic values.
95 Chapter 2: T ask Guide Using Symbol s Using Symbols Y ou can use symbol names in place of data values when: • Setting up triggers • Displaying cap tured da ta • Sea rching fo r patter n s i n.
96 Chapter 2: T ask Guide Using Symbol s T o load object fil e symbols Object fi les are created by your compile r/linker or ot her software development too ls. 1. Generat e a n ob ject fi le with symbolic inform ation usin g your softwar e deve lopment to ols.
97 Chapter 2: T ask Guide Using Symbol s the object f ile symbols are re loaded. T o delete objec t file symbol files 1. Sele ct the Symbol tab , and then the Object File tab. 2. Sele ct the fi le name yo u want to delete in the tex t box l abeled , Object Files with Symbols Loaded For Label .
98 Chapter 2: T ask Guide Using Symbol s whose symbols you wish to relo cate. 3. Sele ct the Relocate Sections... bu tton. 4. Enter the d esired o ffset in the Offset all sectio ns by field. The offs et is applie d from the li nked address or segme n t.
99 Chapter 2: T ask Guide Using Symbol s T o delete user -defined symbol s 1. Under th e Symbol tab, se lect the User Defined tab . 2. Sele ct the lab el you w ant to del ete sym bols from . 3. Select t h e s ymbol to dele te. 4. Sele ct the Del ete button.
100 Chapter 2: T ask Guide Using Symbol s Pattern . • Use the Fi nd Symbols of T ype sel ectio ns to filter the symbol s by type. 4. Select the sy mbol you want to use from the list of Matching Symbols . 5. If you ar e using object fi le symbo ls, you ma y need to : •S e t Offset By (see page 162) to compe nsate for micropr ocessor prefetc hes.
101 Chapter 2: T ask Guide Using Symbol s T o create a r eaders.ini fi le Y ou can change how an ELF/Stabs, T icoff or Coff/Stabs symbol file is processed by cr eating a reader .ini file. 1. Crea te the read er .in i file on yo ur w orkstat ion o r PC .
102 Chapter 2: T ask Guide Using Symbol s section will be read com pletely . This can occur i f the file was created without a "gener at e debugger informatio n" flag (usually -g). Using the - g will creat e a Dwarf or Stabs debug section in addition to the ELF section.
103 Chapter 2: T ask Guide Using Symbol s C MaxSymbolWidth=60 StabsType=2 Example for Coff/S tabs (using T icoff read er) [ReadersTicoff] C C MaxSymbolWidth=60 StabsType=2 Example for T icoff [Readers.
104 Chapter 2: T ask Guide Printing/Ex porting Captured Data Printing/Exporting Captured Data T o print captured dat a Y ou can print captured data from displ ay tool windows. 1. In the display tool window , se lect Print this window from t he F ile me nu.
105 Chapter 2: T ask Guide Print ing/E xpor ting Ca ptured Data 5. Select th e file name and automati c file sequenci ng options . 6. Sele ct the Read File butto n. 7. Drag disp lay , anal ysis, o r toolset icons an d drop t hem on th e File In tool icon t o view th e imported d ata.
106 Chapter 2: T ask Guide Cross-T riggering Cross-T riggering An instrument must be armed before it can l ook for a trigger . By default, instrume nts are set to be armed im mediately when you Run the measuremen t .
107 Chapter 2: T ask Guide Cross-T riggering 2. Run the meas urement. T o cross -trigger with another ins trument 1. Select th e Interm odule but ton (or fr om the Window men u, select S ystem and Interm odule). 2. In the Interm odul e window , select the icon of th e instrum ent to be a rmed, and choose the instrument that will arm it.
108 Chapter 2: T ask Guide Solving Logic Analy sis Proble ms Solving Logic Analysis Problems • “T o test the lo gic analyzer har dware” on page 1 0 8 See Also • “I f nothing h appens wh en y.
109 Chapter 2: T ask Guide Solvin g Logic Anal y sis Pr oblems If any test f ails, contact your local Agilent T echnologies Sales O ffice or Service Center for assistance.
110 Chapter 2: T ask Guide Saving a nd Loading Log ic Analyzer C onfigurations Saving and Loading Logic Analyzer Configurations The Agilent T echnologies 1675 0A/B logic analyzer set tings and data can be saved to a configuration file.
111 Chapter 2: T ask Guide Saving and Loading Lo gic Analyzer Config urations NOTE: The Agilent T echn ologies 16700 A/B logic analys is systems can tr anslate configurati on files from Agilent T echnologies 165 00 and 16505 A logic analysi s syste ms if the m easurement mod ule is the s ame.
112 Chapter 2: T ask Guide Saving a nd Loading Log ic Analyzer C onfigurations.
113 3 Reference • “The Samp ling T ab” on page 115 • “The Format T a b” on page 119 • “The T rigger T ab ” on page 146.
114 Chapter 3: Refer ence • “The S ymbols Tab ” on p age 159 • “Error Me ssages” on pag e 170 • “Specifications and Characteristics” on pag e 186.
115 Chapter 3: Re ference The Sa mpling T ab The Sampling T ab The Sampling tab lets you choose bet ween the lo gic analyzer's asynchronous sampl ing Timi ng Mode or its synchronous sampling State Mode. This t ab also lets you set controls for the selected mode as well as T iming Zoom opt ions.
116 Chapter 3: Refer ence The Sa mpling T ab T iming Mode When you select T iming Mode, the T iming Mode Controls area appears. Full/H alf Channel Configura tion Lets you conf igure the ti ming analyzer fo r fast er sampling and greater m emory dept h, but with half the chann els.
117 Chapter 3: Re ference The Sa mpling T ab State Mode When you select State Mo de, the State Mode Controls area appears. 200 MH z/400 MHz St ate Speed Configura tion Lets you con figur e the state a.
118 Chapter 3: Refer ence The Sa mpling T ab under test) that will enable (qualify) the sampling c lock. Generally , the state mode sam pling clock is taken from the signals that clock valid dat a in the device under test. The clock ch anne l sp ecifi ers gr aphica lly s how y our cl ock setup.
119 Chapter 3: Re ference The Format T ab The Format T a b The Format tab l e ts you assign bus and si gnal names (from t he device under test), to logic analyzer channels. Th ese names are called labels . Labels are used when setting up trigge rs and displaying captured data.
120 Chapter 3: Refer ence The Forma t T ab clock bits span more than one pod pair . See Also “Form atting Labels for Logic Analyz er Prob es” on pag e 57 “T o m anua lly ad just samp ling p osit.
121 Chapter 3: Re ference Importing Netlist and ASCII Files Importing Netlist and ASCII Files Netlist File s The Netlist Impo rt feature provides a method for impor t ing busses and signals from ASCII netlists create d by EDA tools.
122 Chapter 3: Refer ence Importing N etlist and ASCI I Files For Examp le Label1;A2[15:5];A1[5,2] Label1 Bus Name A2 an d A1 Pod Number s [15:5] Cha nnel 1 5 through Channel 5 ("****** *****.... .") [5,2] Chan nel 5 and Channel 2 (". .
123 Chapter 3: Re ference Importing Netlist and ASCII Files Pod A2 Channe l 5, and Pod A1 Chan nel 6. Clock s Label1;CK[AK] Label1 maps to Slot A Clock K.
124 Chapter 3: Refer ence Importing N etlist and ASCI I Files T o I mport an ASCII file. 1. Cre ate an ASC II fil e for impor ting i nto th e l ogic analys is sys tem. For exampl e: Lab2;A2[15: 10,6,3] NewLabel2;A2[15] Label1;A1[15: 0] 2. Sele ct the F ormat ta b.
125 Chapter 3: Re ference Importing Netlist and ASCII Files T ermin ation Adapt er The logic analyz er cable must have the proper RC network at its input in order acquire data correctly . The T ermination Adapter incorporates the RC network into a convenient package.
126 Chapter 3: Refer ence Importing N etlist and ASCI I Files E5346A Hig h Density Adapter The E5346A hi gh-density adapter provide s a convenient and easy way to connect an Agilent logic analyzer t o the signals on your ta rget system for packages that are difficul t to probe.
127 Chapter 3: Re ference Importing Netlist and ASCII Files Mapping Connect or Names 1. Sele ct the F ormat ta b. 2. Select File, then sele ct Import Netlist . 3. Select Next to go t o the M apping Co nnector N ames dialog. 4. Enter a connector n ame from the Net list.
128 Chapter 3: Refer ence Importing N etlist and ASCI I Files 2. Sele ct the file from the File Sele ction di alog box . 3. Select OK 4. Select Next V erify Net to Label Mapping 1.
129 Chapter 3: Re ference Importing Netlist and ASCII Files Select/Cre ate Interface Labels Select any additional labels to be cop ied into the Format tab. T ypically there is no need to add any more labels. However , this screen is u seful when you want to designate a signal bit in a bus as a separate label name.
130 Chapter 3: Refer ence Importing N etlist and ASCI I Files Pod Assignment Dialog Name: Let s you nam e the ana lyzers . Ty p e : Lets you se lect the timin g (asynchr onous) samp ling mode, the sta te (sync hronous ) sampl ing mode , or turn the analyzer of f.
131 Chapter 3: Re ference Importing Netlist and ASCII Files Sampling Positions Dial og The Sampling Positions dialog lets you position the logic analyzer's setup/hold wind ow (or sampling position) so that data on high-speed buses is captured accuratel y , in other words, so that data is sampled when it is valid.
132 Chapter 3: Refer ence Importing N etlist and ASCI I Files Eye Finde r Opti on, Setup T ab File m enu Lets you save /load eye finder da ta. EyeFinder menu Lets yo u run eye finder , choose the run mode, and access the “E ye Fi nder Advanc ed Se ttings Dia log” o n page 133.
133 Chapter 3: Re ference Importing Netlist and ASCII Files If a channel appears in multiple labels, selecti ng that channel will se lect it in each of thos e labels. See Also “Underst anding Stat e Mode Sampl ing Posit ions” on page 2 08 “T o a utoma tical ly adj ust s ampli ng pos ition s” on page 4 7 Eye Finder Advanced Settings Dialog.
134 Chapter 3: Refer ence Importing N etlist and ASCI I Files Eye Finde r Option, Results T ab The Eye Finde r Results display is a digital "eye" diagr am in that it represent s many samples of data capture d in relation to the sam pling clock.
135 Chapter 3: Re ference Importing Netlist and ASCII Files Results menu Let you e xpand/c olla pse the si gnals in a labe l, set the bus view , set the sampl ing po sitio ns to the s uggested s ampling positio ns, and remove all eye finder data.
136 Chapter 3: Refer ence Importing N etlist and ASCI I Files How th e Selected Posi tion Behaves 1. When eye finder is enabled, t he select ed positi on (blue li ne) is set based on t h e man ual setu p/hold val ue. 2. When ever the select ed posi tion is moved, t he manu al setup/h old value is also updated.
137 Chapter 3: Re ference Importing Netlist and ASCII Files An eye finder measurement is curr ently running. Stop the eye finder or wait for it to complete be fore running the eye finder . The eye finder is already run ning on the other machine de fined for this analyzer .
138 Chapter 3: Refer ence Importing N etlist and ASCI I Files "From Eye Fin der: After h ardware calibra tion, the samp ling position s for the follow i ng channe ls may have shifted out of th e selected stable regi on by the amount shown: CHANNEL: AMOUNT ps .
139 Chapter 3: Re ference Importing Netlist and ASCII Files request or when the Sampling Positi ons dialog is closed or iconified. "T imeout: < N K clocks in 5 sec" Eye finder requires sti m ulus at a minim um rate to perform its measurements.
140 Chapter 3: Refer ence Importing N etlist and ASCI I Files 2. The stable region(s) are too small for eye finder to dete ct. In this case y ou must re sort t o adjust ing th e sam ple posi tion ma nually a nd checking its validit y by r unning an ordinary analyzer me asureme nt to see i f the data value s you expect ar e sampled.
141 Chapter 3: Re ference Importing Netlist and ASCII Files than 5 nsec and the clock period is greater than 10 nsec (slower than 100 MHz ). Eye Finder Load/Save Messages. These messages can appe ar when saving or lo ading eye finder data . "... (at line XX in the f ile)" Indicates wher e the error occurred in the file being read.
142 Chapter 3: Refer ence Importing N etlist and ASCI I Files "Failed to open file for re ading/writi ng: NAME" The selected fi le could not be opened. Check access a nd file permissions. "File NA ME alread y exists. Overw rite?" The selected fi le exists.
143 Chapter 3: Re ference Importing Netlist and ASCII Files File: Na me of the eye finder data f ile. Creat ed: Date an d time the eye finder data file was created. Save d: Date and ti me the eye finder data file was la st save d. Y ou are noti fied if the ey e finder data has cha nged si nce the last time it was saved.
144 Chapter 3: Refer ence Importing N etlist and ASCI I Files Manual Setu p/Hold Option When you select Manual Setup/Hold, the following options appear . Label Se lect ion List Let s you sele ct the lab el whos e setup/h old window w ill be positio ned.
145 Chapter 3: Re ference Importing Netlist and ASCII Files posi tion is af ter the sa mpling cl ock. See Also “T o m anua lly ad just samp ling p ositio ns” o n page 50.
146 Chapter 3: Refer ence The T rigger T ab The T rigger T ab The T rigger tab i s used to tell the analyzer when to capture data. T he key event is the trigger . In the Agi lent T echnologies 16 750A/B logic analyzer , you can insert multiple t rigger actions.
147 Chapter 3: Re ference The T rigger T ab • “Save/Recall Subt ab” on page 157 See Also “Underst anding Lo gic Analyzer T ri ggering ” on page 192 “Settin g Up T ri ggers and Runni ng Mea.
148 Chapter 3: Refer ence The T rigger T ab General T iming T rigger Funct ions The following general trigger functio ns are found in the Tr i g g e r Func tions tab when the lo gic analyzer i s in the timing sampling mode. Y ou can edit most of the trigger functions t o specify particular patt e rn and edge events.
149 Chapter 3: Re ference The T rigger T ab • Fi n d 2 edges too clos e together Become s true when the seco nd spec ified edge occur s within a spe cified time after th e firs t specifie d edge.
150 Chapter 3: Refer ence The T rigger T ab • OR T rigger When the logic anal yzer is a rmed by an oth er ins trume nt (a s sp ecif ied in the Intermodul e window), this trigger function becomes true when a patte rn occu rs a specified number of times OR when th e arm signal is received.
151 Chapter 3: Re ference The T rigger T ab This t rigger funct ion has been replaced by t he "Sto re r ange un til pattern occurs" and "Sto re pattern2 until patte rn1 occurs" trig ger function s.
152 Chapter 3: Refer ence The T rigger T ab Becomes true when the spe cified patt ern occurs in the specifi ed number of samp les conse cutive ly . • Find patte rn2 n time s after patte rn1, bef ore.
153 Chapter 3: Re ference The T rigger T ab “T o break dow n a trigger function ” on page 67 “T o cross- trigger wi th another instr ument” on pa ge 107 “T o cr oss-trigge r betwee n two an .
154 Chapter 3: Refer ence The T rigger T ab they ar e speci fied . The lo gic ana lyze r execut es the set of action s in the "then" clause associated with the first listed "if" or "else if" clause that becomes t r ue. • Advanced - 4-way branch Like the 3-way branch, but with 3 "Else if" clauses.
155 Chapter 3: Re ference The T rigger T ab T rigger Posit ion Lets y ou specify where the sample that triggered the analyzer should app ear among all the other samp les that are stored in acquisition memory . Count (State mode onl y). Lets you save ti me or state count infor matio n with the ca ptured data sampl es.
156 Chapter 3: Refer ence The T rigger T ab Default Storing Subtab Store by default Lets yo u spec ify th at Any thi ng , Nothing , Cus tom , or selec ted Tr a n s i t i o n s events b e s tored by d efault . At st art of acquisition Lets yo u choos e wh ether defa ult s torin g is initi ally On or Off .
157 Chapter 3: Re ference The T rigger T ab Status Subtab The Status subtab shows you the sequen ce level that is evaluating captured data, occurrence an d global counter values, and flag values. See Also “T o view the tri gger status ” on page 87 Save/Reca ll Subtab The Save/Recall subt ab lets you save trigge r setups within a session.
158 Chapter 3: Refer ence The T rigger T ab Y ou can also save trigger sequences outside o f configuration fi les by creating trig ger function libraries.
159 Chapter 3: Re ference The Sym bols T ab The Symbols T ab The Symbols tab lets you l oad symbol files or define your own symbols. Symbols are names for particular data val ues on a label. T wo kinds of symbols are avail ab le: • Obje ct File Symbo ls.
160 Chapter 3: Refer ence The Symb ols T ab Object fil e versions During the load process, a symbol database file with a .n s extension will be creat ed by the system. One .ns database file will be creat ed for each symbol file y o u load. On ce the .
161 Chapter 3: Re ference The Sym bols T ab Symbols Selector Dialog Search Pa ttern: Lets you ente r partial symbol name s and the asteris k wildcard character (*) to limit the symbols to choose from (see “S earch Pattern” on page 162) . Use the Rec all button to select from previous search patterns .
162 Chapter 3: Refer ence The Symb ols T ab Of fset By Lets you add an offset value to the starting point of a symbol . This can be use f ul when c ompensa ting for micro proce ssor prefetch es ( see “Offset By O ptio n” on page 162). Align to Lets y o u mask t h e lower order bits of a symbol's va lue.
163 Chapter 3: Re ference The Sym bols T ab func1 and func2 are adjacent to each other in physical memory , with func2 following func1 . In or der to trigger o n fun c2 without getting a false trig ger from a prefetch beyond the e nd of f unc1 , you need to add an offset value to your label val ue.
164 Chapter 3: Refer ence The Symb ols T ab C++ notation. T o improve perf ormance for these ELF symbol files, type information is not associated with variables. H ence, some variables (typically a fe w local static variables) may not have the proper size associated with them.
165 Chapter 3: Re ference The Sym bols T ab The address or addr ess range must be a hexadecimal num ber . It must appear on the same l ine as the symbol name, and it must be separated from the symbol name by one o r more blank spaces or tabs. Address ranges must be i n the following format: beginning address.
166 Chapter 3: Refer ence The Symb ols T ab [START ADDRESS] address #comment text Lines without a precedin g header are assumed to be symbol defini t ions in one of the [ V ARIABLES] formats. Examp l e This is an exam ple GP A file that contain s several different kinds of reco rds.
167 Chapter 3: Re ference The Sym bols T ab NOTE: If you use section de finitio ns in a GP A symbol file, any subse quent fun ction or variab le defin ition s must be within th e addres s ranges of one of th e define d sections. Functions and variables that ar e not with in the range are ignored.
168 Chapter 3: Refer ence The Symb ols T ab V ARIABLES Y ou can specify symbols fo r variables using: • The address of the variable. • The address and the size of t he variable. • The range of addresses occupied by the variable. If you specify only the addr ess of a variable, the size is assumed to be 1 byte.
169 Chapter 3: Re ference The Sym bols T ab Examp l e [SOURCE LINES] File: main.c 10 00001000 11 00001002 14 0000100A 22 0000101E See Also Using th e Source Vi ewer (see the Listing Display T ool help volu me) ST AR T ADDRESS Format [START ADDRESS] address address The addre ss of the pr ogram entr y poin t, i n hexad ecim al.
170 Chapter 3: Refer ence Error Messa ges Error M essages • “Analyzer armed from another module contains no "Arm in from IMB" event ” on page 18 5 • “Branch expression is too compl.
171 Chapter 3: Re ference Error Messages Must assign Pod 1 on the mast er card to s pecify actions for flags When u sing a 16 760A anal yzer in 200Mb/ s state mode, Pod 1 on the master card must be assigned in o rder to add actions for the flag s in a branch action list.
172 Chapter 3: Refer ence Error Messa ges NOTE: For labe ls that do span pod pairs, t he comp lexit y can be re duced to th e same as tha t of the non- split la bel ca se if all b its in th e labe l on all b ut one pod pai r can be se t to Xs in th e event list exp ression for the mea surem ent.
173 Chapter 3: Re ference Error Messages • Canno t AND more than 16 non- split pa ttern ev ents if the patte rn even ts are al l on the same pod pa ir . • Can AND up to 1 60 no n-split pa ttern events if the patter n events are evenly distribute d across all 10 pod pairs on a 5 card set (16 pattern even ts per pod pa ir).
174 Chapter 3: Refer ence Error Messa ges 1 If (complex event list) occurs 1 time then goto next 2 If anything occurs 1 time then Goto Next 3 If (complex event list) occurs 1 time then Trigger and fil.
175 Chapter 3: Re ference Error Messages Specific Guidelines - 800 Mb/s State Mode • Lab els that span pods (split labels) requ ire more combin er resource s than labels with bits th at all be long to a si ngle pod. Wheneve r possibl e, define labels that do not span pods.
176 Chapter 3: Refer ence Error Messa ges comb ine 2 non- split l abels tha t are AN Ded toge ther even thou gh it fai ls to compile a pattern on a singl e label that spans pods. • Cannot spec ify more tha n 3 pattern s or 1 range per pod. Non-split patterns may use operations: =, !=, <, <=,>, >=, In ra nge, Not in r ange.
177 Chapter 3: Re ference Error Messages Counter value checked as an e vent, but no increment action specified This warning occurs b ecause you have used a counter in your trig ger sequence , but do not have Counter Increm ent as an action. Y ou do not need to incremen t the counter in the same sequence level.
178 Chapter 3: Refer ence Error Messa ges Hardwar e Initializati on Failed Please go t o System Administration T ools and run the Sel f-T est Utility (see page 108) on the logi c analyzer . If you have fai lures, contact your Agilent T echnologi es Sales Office for service or soft ware upgrades.
179 Chapter 3: Re ference Error Messages No more Pattern resources available for this pod pair This erro r occurs when you have used up all the pattern resources available. Each pod pair has about 28 pattern resources. Some pattern events use m ore than 1 re source.
180 Chapter 3: Refer ence Error Messa ges Slow or Mis sing Clock The message "Slo w or Missing Clock" o nly appears in state measurement s. H owever , if you have another instrument armed by the state analyzer , a slow or missing clock on the state analyzer wil l prevent the ot her instrument from triggerin g also.
181 Chapter 3: Re ference Error Messages Resume in any action. Y o u do not need to start the timer in the same sequence level. The timer will st ill function if not started, but wil l not change value.
182 Chapter 3: Refer ence Error Messa ges T rigger inhibit ed during timing prestore The "tri gger inhibited" informational message appears when you have a logic analyzer making a conventional tim ing measurement , and it is set to a sl ow sample rate.
183 Chapter 3: Re ference Error Messages expressions must be re duced to 16 and the complexity of some of the expressions may have to also be reduced. Branch expressions t hat are identical (and simple enough to be combined by a single co mbiner resource) shar e the same com biner resource.
184 Chapter 3: Refer ence Error Messa ges resourc es). • An in equality compa re (<,<=,>, >=) with a spli t label patter n event requi r es 2 combiner res o urces . • A r ange on a split lab el patter n event r equire s 4 combin er res ources.
185 Chapter 3: Re ference Error Messages partic ularly use ful when yo u use store qual ifiers to store "no states" (or only the states you are in terested i n) and th e branches taken are stored . • Sa ve the tr igger setu p, then s implify i t to see w hat part of the seq uence does get captured .
186 Chapter 3: Refer ence Specificatio ns and Characteristic s Specifications and Characteristics NOTE: For a complete comparison of all logic analyzer specificatio ns and characteristics refer to the "Agilent T e chnologie s 16700 Series Logic Analysi s Syste m Product O verview".
187 Chapter 3: Re ference Specifica tions and Charac teristics General information - Channel Counts: 1-card module 64 data, 4 clock 2-card module 132 data, 4 clock 3-card module 200 data, 4 clock 4-ca.
188 Chapter 3: Refer ence Specificatio ns and Characteristic s For sample rates = 400 MHz: 68 x (number of modules) - 34 - Global counters: 1 - Glitch/edge recognizers: 1 per pod pair Triggering - Max.
189 Chapter 3: Re ference Specifica tions and Charac teristics What is a Spe cificati on? A Specification is a numeric value, or range of values, that bounds the performance of a pro duct parameter . The product warranty covers the performance of parameters d e scribed by speci fications.
190 Chapter 3: Refer ence Specificatio ns and Characteristic s What is a Functio n Te s t ? Function tests are quick tests de signed to verify basic operation of a product. Function tests include operator's checks and o pera tion verification pr ocedures.
191 4 Concepts • “Underst anding Lo gic Analyzer T ri ggering ” on page 192 • “Underst anding Stat e Mode Sampli ng Posit ions” on page 2 08.
192 Chapter 4: C oncepts Underst anding Logic An alyzer T riggering Understanding Logic Analyzer T riggering Setting up l ogic analyzer triggers c an be di fficult and time-consuming. Y ou could assume that if you know how to program, you should be able to set up a logic analyzer tri gger with no diffi culty .
193 Chapt er 4: Concepts Underst anding Logic Analyze r T rigger i ng placed on the co nveyor belt, and at the other end the boxes fall off. In other words, because logic analyzer mem o ry is lim ited in depth (number of samples), whenever a new sample is acquired the oldest sample curren t ly in memory is thrown away if the memory is ful l.
194 Chapter 4: C oncepts Underst anding Logic An alyzer T riggering Special box Trigger point --------------------- ---------------- -------------- Next: “Summar y of T riggering Capabilities” on .
195 Chapt er 4: Concepts Underst anding Logic Analyze r T rigger i ng edge before it begins looking for the n e xt rising ed ge. Because there is a sequence of st eps to find t he trigger , this is known as a trigg er sequence . Each step of the sequence is called a sequence level .
196 Chapter 4: C oncepts Underst anding Logic An alyzer T riggering time. T wo sequence levels can never be used t o specify tw o events that happen simultaneously . For example, consider the following trigger sequence: 1. If ADDR = 1000 then Go to 2 2.
197 Chapt er 4: Concepts Underst anding Logic Analyze r T rigger i ng analyzer will never trigger . When the condi t ions are m et in a sequence level, i t is clear whi ch sequence level will be executed next when a “Go T o” action is used, but it is no t necessarily clear if there is no “Go T o”.
198 Chapter 4: C oncepts Underst anding Logic An alyzer T riggering Branches Branches are similar to the Switch statem ent in the C progr amming language and the Selec t Cas e statement in Basic. They provide a method for testing multiple condit ions.
199 Chapt er 4: Concepts Underst anding Logic Analyze r T rigger i ng “not in rang e” function as well. Ranges are a convenient sho rtcut so that you don't have to specify “ADDR >= 1000 and ADDR <= 2000”. Next: “Flags” on page 199 Flags Flags are Boolean var iables that are used to send signals from one module to another .
200 Chapter 4: C oncepts Underst anding Logic An alyzer T riggering be used in place of Global Coun t ers, if possible , b ecause they are easi er to use and because ther e is a limited number of Global Counters. Next: “T imers” on page 200 Ti m e r s T imers are used to check the amount of time that has elapsed between events.
201 Chapt er 4: Concepts Underst anding Logic Analyze r T rigger i ng because timer 1 will keep running and cond ition “T imer1 <500 ns” wi ll never be met. There might be another rising edge o n SIG1 that is followed wi t hin 500ns by t he rising edge on SIG 2 that occurs l ater on, so this situation is unacceptable.
202 Chapter 4: C oncepts Underst anding Logic An alyzer T riggering ADDR In Range 1000 to 2000 By default, the Default Sto r age is set to stor e all samples acquired. Y ou can also set the Default Storage to store nothing, which means that no samples will be stored unl ess a sequence level overrides the def ault storage.
203 Chapt er 4: Concepts Underst anding Logic Analyze r T rigger i ng 1. If DATA = 005E then Trigger Else If ADDR in range 5000 to 6FFF then Store Sample Go to 1 Else If ADDR not in range 5000 to 6FFF then Don't Store Sample Go to 1 Alternatively , if t he default storage is set to “Store Every t hing”, use the following: 1.
204 Chapter 4: C oncepts Underst anding Logic An alyzer T riggering The Agilent 16715A trigger user inter face Note that a picture (which corresponds to the selected function) is provided t o the ri ght of the trigger function list.
205 Chapt er 4: Concepts Underst anding Logic Analyze r T rigger i ng The same tri gger as If/Then st atements T rigger functions can be m o dified. Fo r example, if you start with the function “ Find Edge”, you can add anothe r event, and it becomes the same as “Find Ed ge and Pattern”.
206 Chapter 4: C oncepts Underst anding Logic An alyzer T riggering “Find E dge” and “Find Pattern” tog ether Next: “Set t ing U p Complex T riggers” on page 20 6 Sett ing Up Compl ex T riggers Frequently , the most difficult p art of setting up a complex trigger is breaking do w n the proble m.
207 Chapt er 4: Concepts Underst anding Logic Analyze r T rigger i ng different parts o f the trigger to describe how they work. Inline documentatio n on an Agi lent logic a nalyzer Next: “Conclusions” on page 207 Conclusi ons Setting up l ogic analyzer triggers i s very different than wri t ing software.
208 Chapter 4: C oncepts Unde rstan ding St ate Mode Sampli ng Posi tion s Understanding State Mode Sampling Positions Synchronous sam pling (state mode) l ogic analyzers are like edge- triggered fl i.
209 Chapt er 4: Concepts Underst anding Stat e Mode Sa m pli ng Positions T o position the setup/hold wind ow (sampling position) wi t hin the data valid window , a logic analyzer has an adjustable delay on each sampling clock input (to position the setup/hold window f or all the channels in a pod).
210 Chapter 4: C oncepts Unde rstan ding St ate Mode Sampli ng Posi tion s channel in a small fraction of the time (and without the extra test equipment) that it takes to make the adjustments manually . Eye finder is an easy way t o get t he smallest possible logic analyzer setup/hold window .
211 Glossar y absolute D enotes th e time peri od or count of states between a captured state a nd the trigger state . An absolute count of -10 indicat es the state was c aptured ten states before the trigge r state was capture d. acquisition Denote s one compl ete cycl e of data gather ing by a measur ement m odule .
212 Glossary pointing device, to cl ick an ite m, posi tion the curs o r over the item. Then quickl y press a nd releas e the left m ouse butto n . clock cha nnel A l ogic analyzer channel that can be used to carry the clock signal.
213 Glossary inst rument tool . Multi ple da ta s ets can be di splay ed togeth er wh en sourced in to a single displa y tool. Th e Filter tool i s used to pass o n parti a l data sets to a nalysis o r dis play tools .
214 Glossary Using th e T ouchscr een: Posit ion your fin ger over the item, then press and hol d finger to the scre en. While holdin g the finger down, sl ide the fi nger al ong the screen draggi ng the item to a new loca tion. Wh en the item is posit ioned where you wan t it, re leas e your finger .
215 Glossary logic analyze r what data y ou want to collect, such as which ch annels represent bu ses (labels) and what logi c thres hold you r sign als use . frame The Agilen t T echno logies or 16700A/B-ser ies logic analys is syste m mainfr ame. See als o logic analysis system .
216 Glossary is usu ally repr esen ted as dec imal numbers separated b y periods; for example, 192.35.12 .6. Ask your LAN adminis trator if you ne ed an inter net address. labels Labels are used to group and iden tify logi c anal yzer c hanne ls. A labe l con sists o f a na me and an associated bit or gro up of bits.
217 Glossary machine becau se th e master car d is in slo t C of the ma infram e. The ot her cards of the modul e are called expansion car ds . menu bar T he menu ba r is locat ed at the top of a ll window s. Use it to select File ope rations, tool or sys tem Options , and t ool o r sy stem leve l Help .
218 Glossary by the channel width of the instr ument. pod See pod p air point T o point to an item , move the mous e cur sor o ver t he i tem, or posi tion your finger over the i tem.
219 Glossary measurem ent as part of it s data acquisition cycle. Sampl ing Use the se lections u nder the lo gic anal yzer S ampli ng tab to tell the logic analyzer how yo u want to make measurements, such as State vs.
220 Glossary symbols Symbol s represen t patterns and ra nges of values f ound on labeled se ts of bits. T wo kinds of symbols are available: • Obje ct file s ymbols - Symbols from your source code, and symbol s generated by your compil er . Object file symbo ls may repres ent gl obal vari able s, functi ons, labe ls, and source l ine numbe rs.
221 Glossary timing measur e ment In a tim ing measurement, the logic analy zer samp les dat a at regul ar in terval s according to a clock signal inter nal to the t iming analy zer . Sinc e the analyzer is clocked by a signal that is not relate d to the sy stem und er test, timing meas urements capture traces of ele ctrica l activ ity o ver tim e.
222 Glossary field . This action allo ws you to select spec ific por tions of a partic ular waveform in acquisition memory that will be displa yed on the s creen.
223 Symbols & , 78 *, bi t as signm ent , 59 +, label polarity , 61 -, label polarity , 61 ., bit unass ignment , 59 Numeri cs 1.25 ns sample rate , 41 16750A/B 400 MHz State/2 GHz Timing Zoom Logic A nalyzer , 2 16750A/B characteristics , 186 16750A/B sp e cifications , 18 6 2 GHz T i ming Zoom , 54 2.
224 Index clock channels, inputs available as data , 119 clock qualifier , 14 clock qualifier s, characteristic , 186 clock setup , 14 clock setup area , 117 clock speeds and sampling positions , 43 c.
Index 225 errors in data , 92 evaluation order , 83 event evaluation orde r , 83 even t list, nami ng , 84 event s , 20 , 78 event s, coun ter , 80 event s, flag , 81 , 149 , 15 2 even ts, group ing ,.
226 Index in symbo l browser , 162 increment counter , 80 informatio n, for more , 24 input capacitance, probe, characteristic , 186 input resistance, probe, characteristic , 186 insertin g a named ev.
Index 227 patt erns , 66 pause ti mer , 79 performance verif ication , 108 perio d, sampl e , 42 pod assignme nt dialog , 57 pod clocking, demult i plex , 44 pod pa irs, as signin g , 17 pod t hre sho.
228 Index skew , channel-to-channel, characteristic , 186 slave clocks for pods , 44 slow clock message , 180 SMTP , 76 soft shutdown opt ion , 53 source li ne numbe r s , 168 source viewer , 88 speci.
Index 229 timing trigger functi ons , 147 timing trigger functi ons, general , 148 Ti m i n g Z oo m d a t a , 89 timing, memory depth , 41 transitional timing , 37 transitional timing considerations .
230 Index.
P u b l i c a t i o n N u m b er : 5 98 8 -9040 EN s1 January 1, 2003.
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