HP (Hewlett-Packard)メーカーHP 16500Aの使用説明書/サービス説明書
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Front -Panel Operation Reference HP 1651 0B Logic Analyzer Mod ule for the HP 16500A Logic Analysis System ÿ Copyr igh t Hew lett- Pa cka rd Com pany 1 989 Manu al Set P art Nu mber 165 10-9 0913 Printed i n the U.
Printing History New editions are complete revision s of the manual. Update packages, which are issued between editions, contain additional and replacem ent pages to be merged into the manual by th e customer. The dates on the title page change only when a new edition or a new update is published.
List of Effective Pages The List of Effective Pages gives the date of the current edition and of any pages changed in updates to that edition. Within the manual, any page changed since the last edition is ind icated by printing the d ate the changes were ma de on the b ottom of th e page .
Introductio n About this manual... Welcome t o the new generation o f HP lo gic analyz ers! The H P 16500 A Logic Analysis System has been d esigned to be easier to use than any Hewlett-Packard logic analyze r before. In addition, because of its configurable architecture, it can easily be tailored to you specific logic desi gn and d ebug n eeds.
Contents Chapter 1: General I nformat ion L o g i cA n a l y z e rD e s c r i p t i o n .................................. 1 - 1 U s e rI n t e r f a c e ........................................... 1 - 1 Configuration Capabilities ....................
Chapter 3: Usin g the Fron t-Pan el I nterfa ce I n t r o d u c t i o n ............................................... 3 - 1 U s i n gt h eM o u s e ........................................... 3 - 1 H o wt oS e l e c tM e n u s ......................
Chapter 5: Menus I n t r o d u c t i o n............................................... 5 - 1 S y s t e mL e v e l M e n u ......................................... 5 - 1 S t a t e / T i m i n gC o n f i g u r a t i o nM e n u ........................
R e a d i n gt h eS e q u e n c eL e v e lD i s p l a y ........................... 5 - 5 3 Acquisition Fields ......................................... 5 - 5 5 R u n / T r a c eM o d e ........................................ 5 - 5 5 A r m e dB y ...
Chapter 7: Using The Timing Analyzer I n t r o d u c t i o n............................................... 7 - 1 P r o b l e mS o l v i n gw i t ht h eT i m i n gA n a l y z e r ...................... 7 - 1 W h a tA mIG o i n gt oM e a s u r e ? ....
Chapter 9: State Compare Menu I n t r o d u c t i o n ............................................... 9 - 1 A c c e s s i n gt h eC o m p a r eM e n u................................. 9 - 2 T h eC o m p a r ea n dD i f f e r e n c eL i s t i n gD i s p l a y s.
Chapter 12: Using the Timing/State Analyzer I n t r o d u c t i o n.............................................. 1 2 - 1 P r o b l e mS o l v i n gw i t ht h eT i m i n g / S t a t eA n a l y z e r ................ 1 2 - 2 W h a tA mIG o i n gt oM e a s u r e ? .
8 0 2 8 6 ................................................. 1 4 - 8 8 0 3 8 6 ................................................. 1 4 - 9 6 8 0 0o r 6 8 0 2 .......................................... 1 4 - 1 0 6 8 0 9o r 6 8 0 9 E ......................
Appencix C: Specifications and Characteristics I n t r o d u c t i o n............................................... C - 1 S p e c i f i c a t i o n s .............................................. C - 1 P r o b e s...................................
1 General Informati on Logic Analyzer Description The HP 16 510B logic a nalyz er is part of a new genera tion of ge neral purpos e logic a nal yzer s with impr oved fe atur es to ac commod ate nex t generation design tasks.
The knob on the front panel is used to move the cursor on certain menus, increment or decrement numeric fields, and to r oll the d isplay. The touchscreen fields can be selected by touch or with the optional mouse.
Key Features Two 3.5-inch disk drives are integral to the instrument for storing logic analyzer configuration s and acq uired data . The disk driv e also provides a way of loading inverse assembly configuration files into the logic analyzer for conf iguring ea se.
Acces so ry HP Part N o. Qua nti ty Probe a ss embl ie s 01650 -616 08 5 Probe c able s (35MHz S tat e) 16510 -616 01 3 Probe c able s 16510 -616 02 2 Grab bers (N ote 1 ) 595 9-0288 100 Ground lea ds.
2 Probing Introduction This chapter contains a description of the probin g system of the HP 1651 0B logic ana lyzer. It also con tains th e informa tion you need to connec t the pr obe s yste m comp onen ts to eac h other , to the lo gic a nalyz er , a n dt ot h es y s t e mu n d e rt e s t .
The HP 10269C General Purpose Probe Interface Instead of connecting the probe tips directly to the signal lines, you may use the HP 1 0269C Gen eral P urpo se Pro be Inte rf ace (o ptio nal ). This allows you to c onne ct the pro be cab les (wit hout th e probes ) to con necto rs on the i nterf ac e.
General Purpose Probing General pur pose prob ing invo lves conne cting the p robes dire ctly to your targ et syste m wit hout us ing th e inter face . Gener al purp ose pro bing do es not lim it you to spe cifi c hoo k-up sc heme s as th e prob e inte rfac e does .
The HP 16510B Probing System The stand ard HP 165 10B probi ng system con sists of prob es, pod s, prob e cable and grabbers. This system is passive (has no active circuits at the outer end of the cable). This means that t he pods and probes are smaller and lighter, making them easier to use.
Probe Cable The pro be pod c abl e conta ins 17 si gna l lines , 34 ch assis gr oun d lin es and two power lines th at is woven tog ether. It is 4.5 feet long . Caution The prob e grou nds a re cha ssi s (eart h) grou nds , not "fl oati ng" groun ds.
You can connect the probe directly to the test pins on your target system. To do so, the p ins mu st be 0.63 mm (0 .025 in .) square p ins or rou nd pins with a diameter of be tween 0.66 mm (0.026 in.) and 0.84 mm ( 0.33 in.). Each pro be has an in put im pedanc e of 100 k Ω in parallel with approx imat ely 8 pF .
Probe Grounds You can grou nd the prob es in one of two ways. Yo u can ground th e probes with th e pod ground o nly; howe ver, the grou nd path won’ t be the same length as the signa l path th roug h the pro be. If you r prob e ground path mu st be the s ame a s your s ignal pa th, u se the sh ort gro und lea d (prob e grou nd).
Signal Line Loading Any sign al line you inten d to probe must b e able to supply a minim um of 600 mV to t he pro be ti p, whi ch ha s a n input imped anc e of 10 0 k Ω shunted by 8 pF. If the signal lin e is incapable of this, you will not only h ave an incor rec t meas ure ment bu t the syst em unde r test ma y also mal fun ctio n.
Connecting the Probe Cables to the Logic Analyzer The pro be cabl es are i nstalled in t he Logic A naly zer modu le at the f actor y. The c able fo r po d 1 is t he fa r lef t cabl e (rea r vie w). C abl es 2 th rou gh 5 follow cable 1 consecutively from left to r ight.
Disconnecting the Probes from the Pods The prob es ar e ship ped al rea dy inst alle d in the p ods. Howe ver, you can disco nnec t any un- used prob es from a ny of t he pods .
Connecting the Grabbers to the Probes You conne ct the grabb ers to th e prob es by sl ippin g the c onne ctor at the end of t he probe o nto the re cessed p in in the side of t he grab ber. I f you need to us e grabbe rs fo r either th e pod or the pr obe gr ounds , connec t them to the ground leads the same way you connect them to the probes.
Labeling Pods, Probes, and Cables So you can f ind the po ds and pr obes yo u want to c onnect to your ta rget system, you need to be able to quickly identify them. Included with your logic analy zer are self -adh esive labels fo r each pod, ca ble and p robe.
3 Using the Front-Panel Interface Introduction This chapter gives you an overview of how to use the fr ont-panel interface. The front-p anel use r interfac e is merely a ccessin g the many menus a nd using t he con veni ent t ouch -sc reen to m ove ar ound t he me nu tr ee.
How to Select Menus Before you try to select one of the main menus, make sure the field in th e upper left-hand corner is set to State/Timing E. If the HP 16500A is in System or Intermodule , touch th at field an d select State /Timing E wh en the pop-up app ears.
How to Switch Between Analyzers You can switch between analyzers in any main menu by to uching the field (sec ond fro m the l eft i n the upp er le ft- hand c orne r). Wh en the pop-up a p p e a r sy o uc a ns e l e c tt h ed e s i r e dm e n ui nt h ed e s i r e da n a l y z e rw h e nb o t h analyz ers are o n.
How to Close Pop-up Menus Some po p-up m enus autom atic ally c lose when y ou touc h a de sire d fie ld. After closing, the logic analyzer places your choice in t he main menu field from whi ch you o pene d the p op-up. Other po p-up m enus don’t a utoma tic all y clos e when yo u make your sele ction (i.
An example of one of these is the clock field in the State Format Specification menu. When you select the c lock field in this menu it will pop-up a nd sh ow you all fi ve clo cks ( J , K , L , M ,a n d N ). W hen y ou se lec t one of t he five cl ocks, ano ther pop- up app ears show ing you t he availa ble choices of clock sp ecifications.
When yo u tou ch one o f these the p op-up will close, ho wever , the origi nal clock pop-up still remains open. When you are finished specifying the choice s for the clocks, yo u close the orig inal pop -up menu b y touch ing Done . How to Ente r Numeric Data There are a number of pop-up menu s in which you enter numeric data.
If you select the User option, a numer ic ke ypad pop -up appe ars whe re you enter the desired threshold voltage. After selecting the value, you selec t the units (i.
For exa mpl e, you c an nam e ea ch a nalyz er wi th a nam e tha t is repres entativ e of you r measure ment. The d efault n ames for the a nalyz ers within the logic analyzer are MACHINE 1 and MACHINE 2. To rename an analyzer, touch the fie ld to the right of Name :_____ __ in the State/T iming E Configur ation menu.
How to Roll Data The roll feature is available in all menus that contain off-screen data. This allows yo u to roll data f or viewin g. Data can be off -screen b oth above and below o r left a nd righ t of what you see on sc reen. One exa mple of a men u having off- scree n data ab ove and bel ow the screen is the State Listing.
An example o f off-scr een da ta left a nd righ t can also be shown in figure s 3-7 and 3-8. Figure 3-7 illustrates a timing Trace m enu with labels off screen. In this cas e only six of the eight labels can be displayed at a time. Whenever there is data off screen to the left or right, an additional field exists in the menu as shown in figure 3-7.
Assignment/ Specification Menus There are a num ber of pop -up menu s in which you c an assign or specify what you wa nt the lo gic a nalyz er to do. T he bas ic me nus of th is type consist of: • A.
To assign bits to either Analyzer 1 or Analyz er 2 there must be at least one pod assigned to the d esired ana lyzer . If there ar e no pods a ssigned to the analyzer you wish to use follow steps 1 and 2. If there is a pod assigned to the de sire d analy zer go to s tep 3 w here yo u acces s the Fo rmat me nu.
Specifyi ng Patterns The Pattern field a ppears in sever al menus. Patterns c an be specified in one of the av aila ble num ber ba ses. Patt ern s can be vie wed in ASCII , but cann ot be e ntere d in AS CII. The conve ntion for " don’t care" in these menu s is an X exce pt in the decimal bas e.
Specifyi ng Edges You can selec t a positve-going ( ↑ ), negative-going ( ↓ ), and eit her e dg e ( ) f o ry o u rt r i g g e r . To specify e dges, ente r the T race men u and follow the se steps: 1. Tou ch the field i n the bot tom l eft c orne r of the displ ay.
4 Using t he Menu s Introduction This cha pte r cont ains me nu map s of the HP 16 510B lo gic ana lyz er. Sin ce the front-pa nel user interfa ce consists main ly of menus that you access to configu re the logic an alyzer, th e menu maps pro vide quick r eferen ce to the menus, menu op tions, and ultim ately the functions of the logic analy zer.
State/Timing Configuration Menu Map Figure 4-1. State/Timin g Configu ration Menu Using the Menus HP 16510B 4 - 2 F ront-panel Reference.
Timing Format Menu Map Figure 4-2. Timing Format Menu Map HP 16510B Using the Men us Front-Panel Reference 4 - 3.
Timing Trace Menu Map Figure 4-3. Timing Trace Menu Map Using the Menus HP 16510B 4 - 4 F ront-panel Reference.
Timing Waveform Menu Map Figure 4-4. Timing Waveform Menu Map HP 16510B Using the Men us Front-Panel Reference 4 - 5.
Figure 4-4. Timing Waveform Menu Map (continued) Using the Menus HP 16510B 4 - 6 F ront-panel Reference.
State Format Menu Map Figure 4-5. State Format Menu Map HP 16510B Using the Men us Front-Panel Reference 4 - 7.
State Tra ce Menu Map Figure 4-6. State Trace Menu Map Using the Menus HP 16510B 4 - 8 F ront-panel Reference.
Figure 4-6. State Trace Menu Map (continu ed) HP 16510B Using the Men us Front-Panel Reference 4 - 9.
State Lis ting Menu Map Figure 7-4. State Listing Menu Map Using the Menus HP 16510B 4 - 10 Front-panel Reference.
State Compare Menu Map Figure 4-8. State Compare Menu Map HP 16510B Using the Men us Front-Panel Reference 4 - 11.
State Wa veform Menu Map Figure 4-9. State Waveform Menu Map Using the Menus HP 16510B 4 - 12 Front-panel Reference.
Figure 4-9. State Waveform Menu Map (continued ) HP 16510B Using the Men us Front-Panel Reference 4 - 13.
State Chart Menu Map Figure 4-10. State Chart Menu Map Using the Menus HP 16510B 4 - 14 Front-panel Reference.
Figure 4-10. State Chart Menu Map (continu ed) HP 16510B Using the Men us Front-Panel Reference 4 - 15.
Mixed Display Menu Map Figure 4-11. Mixed Display Menu Map Using the Menus HP 16510B 4 - 16 Front-panel Reference.
5 Menus Introduction This ch ap ter des crib es the m enus an d pop -up m enus th at you w ill us e on your lo gic ana lyz er. Th e purp ose a nd funct ions of e ac h menu ar e explained in detail, and we have included many illustrations and examples to make the explanations clearer.
State/Timing Configuration Menu The State/Timing Configuration menu for the HP 16510B Log ic Analyzer is shown below. The fields in the menu th at are numbered in the figure are desc ribe d in thi s sec tion . 1N a m e Y o un a m ea na n a l y z e rb ys e l e c t i n gt h eN a m ef i e l du n d e ri t .
A tt h et o po ft h ek e y p a dp o p - u p ,i s ab o xw h e r et h ec u r r e n tn a m ea p p e a r s when th e pop- up ope ns, and wh ere t he new na me will ap pear wh en you t o u c hk e y so nt h ek e y p a d .I nt h en a m eb o xi sac u r s o rw h i c hi n d i c a t e si n what space yo ur next selec tion will be plac ed.
3 Autoscale The pur pose of Autoscale is to provide a starting point for setting up a measurement. T he Autoscale field only a ppears on a tim ing analyzer.
4 Pods Each po d can be assigned to o ne of the ana lyzers. Wh en the HP 165 10B Logic An alyze r is p owere d up, Pod 1 i s ass igne d to Anal yzer 1 a nd Pod 5 is assigned to Analyzer 2. To ass ign a p od, tou ch the pod fie ld. Wi th the p op-u p that a ppea rs, y ou can ass ign the pod to Anal yze r 1, Analy zer 2, or Unas sign it .
Print Scree n . In th e Prin t Scre en mod e, the pr inte r use s its gr aphic s capabilities so that the printout will look just like the lo gic analyzer screen.
If you wish to stop a printout before it is completed, touch Ca ncel .T h i s stops th e pri nt and the m essa ge "Pr int Ca ncel led" ap pear s at th e top of the disp lay .
Format Specification Menus At power up the Timing and State Format Specification menus look basically the same, with a few exceptions in the state analyzer. The Timing Format Specif ication menu looks like that shown be low: The State Format Specification menu for the HP 16510 B looks like the following: 1 2 5 4 3 Figure 5-6.
These men us show only o ne pod assign ed to eac h analyze r at power u p. Any numbe r of p ods can b e ass igne d to on e anal yze r, fro m none t o all five. In the Format me nus, on ly three pod s appea r at a time in th e display . If there are any pods off screen, an additional field will be present.
To access one of the Label fields, touch the desired field. You will see a pop-up m enu l ike th at sho wn bel ow. Tur n Lab el O n . Sele cting this option turns the label on and gives it a default le tter name.
2 Polar ity (Po l) Each label has a polarity assigned to it. The default for all the labels is positive ( + ) polarity. Yo u can change the polarity of a label by touching the polarity field. This tog gles the polarity between positive ( + ) and nega tive ( − ).
Assignin g one chan nel per labe l may be hand y in some applic ations. Thi s is illustrated in chapter 7 of the HP 16510B Getting Started Guide .A l s o , you can assign a channel to more than one label, but this usually isn’t desi red. Labels may have from 1 to 32 channels assigned to them .
If you touch the pod threshold fields you will see the followin g pop-up menu . TTL sets the threshold at +1.6 volts, and ECL sets the threshold at − 1. 3 volts. The User option lets you set the threshold to a specific voltage between − 9.9 V and +9.
You enter a threshold in the pop-up with the k eypad by touching the desired value, units and polarity. When the correc t threshold voltage is displayed, to uch DONE . The po p-up will close and the new threshold will be placed in the pod threshold field.
There ar e four f ield s in the Sym bol Tabl e menu . They a re: • Labe l • Bas e • Symbol Wid th • Symbol na me Labe l . The L abel field identifies the la bel for which you are specifying the symbols. If yo u select this field yo u will get a pop- up that lists all the labels that are turned on in that ana lyzer.
To change the base, touch the current base. You will see the following pop- up men u. If more th an 20 ch annels are assign ed to a labe l, the Bina ry optio n is not offered in th e pop- up. The reason f or this is tha t when a symbol is specified as a ra nge, ther e is only enoug h room for 2 0 bits to be displa yed on the scree n.
Symbol Width . The Symb ol Width field lets you spe cify how m any characters of the symbol name will be disp layed when the symbo l is refere nced in the Timing and Stat e Trace Spe cification menus, the Tim ing Waveforms menu, or the State Listing menu.
The first of these fields defines the sym bol as either a pattern or a range. If you touch this field, it will toggle between pattern and range . When the symbol is defined as a pattern, one field (Pattern/sta rt) appears to specify what the pattern is.
If the s ymbol is defin ed as a r ange , two fie lds ap pear i n which y ou spec ify the uppe r and l ower bo unda ries of the r ange. The fields are Patte rn/Star t and Stop. Touching either of these fields gives you a pop-up with which you can specify t he bo undary of the r ange.
You can spec ify range s that overlap or ar e nested with in each o ther. They must be specific. Don’t cares are not allowed. The logic analyzer gives p atterns priority over rang es when disp laying measurements.
6C l o c k The Clock field is pr esent in the F ormat Specifica tion menu on ly in the state analyz er. This field displays th e clocks that ar e to be used to clock the logic analyzer. The display will be referred to as the "clocking arrang emen t.
With this menu you set the condition needed by each clock. You can speci fy tha t the log ic an alyze r loo ks for the n ega tive e dge of t he cloc k, th e positive edge, either edge, a high level, or a low level, or y ou can turn the clock off . The clocks a re combin ed by ORing and ANDing them .
With this arrangement, the logic analyzer will clock the data when there is a negative edge of the J clock OR a p ositive edge of the K clock, AND when th ere is a h igh level o n the M clock OR a l ow leve l on the N clock. You must always spe cify at leas t one c lock e dge .
Normal . This option specifies that clocking will be do ne in single phase. That is, the c loc king arra ngemen t locat ed in the Clock f ield above the pods in the State Format Specific ation menu will be used to clock all data (pods) assigned to this machine.
Demultiplexing is done on the data lines of the specified pod to rea d only the lower eight bits. This is two phase clocking, with the Ma ste r Cloc k following the Slav e Clock . The a nalyz er fi rst loo ks for t he cloc kin g arrang emen t that you spe cify i n the Slave Clock .
The Master and Slave Clocks can have th e same clocking arrangements. The clocking is still do ne the same way, with the lo wer eight bits being clocked first on the Slave Clock, then on the Master Clock. Mixe d Cloc ks .T h e Mixed C loc ks option allows you to clock the lower eight bits of a pod separately from the upper eight bits.
8C l o c k P e r i o d This field p rovides greater m easur ement a ccurac y when yo ur state inp ut clock period is greater than 6 0 ns. When yo u select >6 0n s ,t h es t a t e analyzer p rovid e.
Timing Trace Spec ifica tion Menu Fields The fields in the Timin g Trac e Specif ication m enu are: 1) Run/Tr ace Mod e 2) Arme d by 3) Acquisition mode 4) Lab el 5) Base 6) Find Pattern 7) Pattern D uration ( present for ____ __) 8) The n find Ed ge These are descr ibed in t he following sections.
Single Trace mode acquires data once per trac e. Repetitive Trace mode repeats single acquisitions until Stop is touched, o r until the time interval between two specified p atterns is less than or greater than a specified value, or within or not within a specified range.
3 Acquisition Mode The Acquisition mode field allows you to specify the mode in which you want the timing analyzer to acquire data. You are given two choices for the mode of acquisition: Transitional and Glitch. When you tou ch this field, the field toggles from one m ode to the other.
Traditional timing samples and stores data at regular intervals. Transitional timing samples data at regular intervals but stores a sample only when there has been a transition on o ne or more of the c hannels. This makes it possible for Transitional timing to store more information in the same am ount of me mor y.
With these glitch detection fields you specify on which channel or channels you want th e analyzer to look for a glitch. These fields are d i s c u s s e di nm o r ed e t a i li nt h e" T h e nF i n dE d g e " s e c t i o nl a t e ri nt h i s chapter .
5B a s e The Base fields allow you to specify the number base in which you want to define a pattern for a label. The Base fields also let you use a symbol that was specified in the T iming Symbol Table for the pattern. Each labe l has its own base defined separ ately from the other labels.
The Symbol o p t i o ni nt h e Base po p-up allows yo u to use a symb ol that has been specif ied in the Timing Symbol Tables as a pattern, or specify absolute and enter another pattern. You specify the symbol you want t o use in th e Find Patter n field.
As mentione d in the previo us section on the B ase field, if you spe cify ASCII as th e base for t he label, you won’t be able to enter a pa ttern. You must specify one of the other number bases to enter the pattern, then you can switch the base to ASCII and see what ASCII characters the pattern repres ents.
If you select this field you get a pop -up similar to t hat shown : The pop-up lists all the symbo ls defined for that label. It also con tains an option a bso lute . Plac ing th e blu e bar on this o ption c ause s a nothe r fie ld within the pop-up to appear.
7 Pattern Duration (present for_____ _) There are two fields with which you specify the Pa ttern Duration. They are loc ated ne xt to present fo r ______ in the Timing Trace Specification menu. You use these fields to tell the timing analyzer to trigger before or after the specified patte rn has occurred f or a given length of time.
As an e xample, supp ose you c onfigur e the pre sent f or field a s shown : This configuration tells the timing analyzer to look for a cer tain pattern specified by you that has a duration of greater than 50 ns. Once the timing analyzer has found the pattern, it can look for the trigger.
8 Then Find Edge With the Then fi nd E dge fields you can spec ify the edges (transitions) of your data on which your timing analyzer triggers. You can specify a positive edge, a negative edge, or either edge. Each label has its own edge trigger specification field so that you can specify an edge on any channel.
If yo u wan t to d elete an edg e speci fica tion , pla ce the cu rso r on th e arro w for tha t cha nnel an d touch th e . (per iod). To cle ar an entire l abel, t ouch CLEAR in th e pop- up. When you have finished spe cifying edge s, tou ch Done to close the po p-up.
Glitch Triggering . When you set the Acquisition mode on Glitch, a glitch detection field for eac h label is added to the scree n. These fields allow you to specify glitch triggering on your timing analyzer. Selecting one of these fields brin gs up the followi ng pop- up menu.
If you want to delete a glitch specification, place the cursor on the asterisk and touch the period. The asterisk is replac ed with a period. Note When you close the pop-up after specifying glitches, you will see dollar signs ( $$.. ) in the Glitch field.
State Tra ce Specification Menu The State Trace Specific ation menu allows you to specify a sequence of states required for trigger. The default setting for the menu looks like that shown below .
Qualifier: a term you specify that can be anystate, nostate, a single pattern reco gnize r, a ra nge rec ogni zer , the c omple me nt of a patt ern or ra nge recognizer, or a logica l combination of pattern and range rec ognizers. When you select a field to spec ify a qualifier, you will see the following qualifier pop-up menu.
Note If two multi-pod state a nalyzers a re on, the qualifier pop-up me nu will show that only four pattern recognizers are a vailable to each analyz er. Pattern recognizers a -d and the range re cognizer go with the first analyzer created, and patter n recognize rs e-h go with the second analyze r.
As shown in the previous figures, the range is included with the first group of patterns (a-d). If you select the range field, you will see the following pop- up men u.
When you have specified your combination qualifier, se lect Done .T h e Full Qualifier Specifica tion pop-up closes and the Boolean expression for your qualifier appears in the field for which you specified it. Sequence Levels There are e ight tr igg er sequen ce leve ls availabl e in the sta te analyze r.
1 I nsert Lev el To insert a level, touch the field labeled Insert Level . You will see the followi ng pop- up me nu. Cancel returns you to th e sequenc e level po p-up with out inser ting a level. Befo re ins erts a le vel bef ore t he pre sent le vel.
3S t o r a g e Quali fie r Each sequence leve l has a storage qualifier. The storage qualifier spe cifies the states that are to be stored and displayed in the State Listing. Selecting this field gives you the qualifier pop-up menu shown in figure 5-48, with which you specify the qualifier.
5 Occurrence Counter The primary branching qualifier has an occurrence counter. With the occurr ence c ounte r fie ld you spe cify the n umbe r of times t he bra nchin g qualifier is to occur before m oving to the next level. To change the value of the o ccurrence counter, touch the field.
Selecting the field gives you a pop-up with two options. On e option is what the field said previously. The other option is Enable on . If you se lect this option, the Sequence Level pop-up changes to look similar to tha t shown below .
As an e xample, supp ose you c onfigur e the sequ ence le vel of fig ure 5-59 to look like that shown below. The logic analyzer will store the state given by pattern recognizer d until it comes acr oss the sta te given by a . When it sees state a , the l ogic a na lyz er starts to store the state given by pattern r ecognizer e .
Reading the Sequence Level Display Reading t he display i s fairly strai ghtforw ard. For exa mple, su ppose you r display loo ks like that sho wn below. In leve l 1 anys tate is stored while the lo gic analyzer searches for five occurr ences o f the patte rn give n by pattern r ecogniz er a .
An example of a state listing for the previous State Trace configuration is show n bel ow . The s tate p att ern s spec ifie d are: a=B 0 3 C b = 0000 c=8 9 3 0 Anystate was stored while the analyzer looked for five occurrences of the state B03C .
Acquisition Fields The acquisition fields are comprised of the Trace mode, Armed by, Branches, C ount, and Pr estore field s, as sho wn below. 1 Run/Trace Mode You specify the mode in which the timing analyzer will trace when you touch Run . You have t wo cho ice s for tr ac e mode : Single and Repetit ive .
You sele ct the tr ace mo de b y tou ching th e Run field, and, without lifting your finger from th e screen, move it to the desired trace mode. When you lift your finger, the logic analyzer traces data in the mode you specify.
3 Branches The B ranche s field allows you t o conf igure th e seque ncer of your stat e analyze r to branch f rom one sequenc e level to another with seco ndar y branching qualifiers, or to restar t when a certain c ondition is met. Selecting this field gives you the following pop-up m enu.
Per L evel . Selecting the Per level option allows you to define a seconda ry branching qualifier for each se quence level. A statem ent is added in each level so tha t you ca n con figur e the a nal yzer t o mov e to a dif fe rent l evel when a specified c ondition is met.
In th is ex ampl e, as t he sta te an aly zer st ores an ysta te , it will branch to sequence level 6 if it finds the state given b y qualifier e . The tri gger se quence le vel is use d as a bo undary f or bra nchin g betwee n levels.
Each sequ ence le vel can b ranch to on ly one lev el throu gh a second ary branching qualifier. However , the number of times to which a level can be branch ed is limited on ly by the numb er of levels present.
4 Count The Count fi eld al lows you t o place tags on s tat es so yo u can co unt the m. Counting cuts the acquisition m emory in half from 1k to 512, and the maximum clock rate is reduced to 16. 67 MHz. Selecting this field gives you the following pop-up m enu.
An example of a state listing with time taggin g relative to the previo us state is sho wn below. An example of a state listing with time tagging relative to the trigger is shown below .
States . State tagging counts the number of qualified states betwe en each stored state. If you sele ct this option, you will see a qualifier pop-up menu like that shown in figure 5-48. You select the qualifier for the state that you wan t to cou nt. In the State Listing, the state count is displayed under the label States.
An example of a state listing with state tagging relative to the trigg er is shown below . 5P r e s t o r e Prestore allows you to store two qualifie d states bef ore each state that is stored. There is only on e qualifier that enables prestore for each sequence level.
Qualifier and Pattern Fie lds The qualifier and pattern fields appear at the bottom of the State Trace Specification menu. They allow you to specify patte rns for the qualifiers that are us ed in the se quen ce leve ls. 1L a b e l The Label fields disp lay the labels that you specified in the State Format Specification menu.
2B a s e The Base fields allow you to specify the number base in which you want to define a pattern for a label. The base fields also let you use a symbol that was specified in the State Symbol Table for th e pattern. Each label has its own base defined separately f rom the other labels.
3 Qual ifier Fi eld If you select the qualifier field, you will see the following pop-up menu. Patter ns . The pattern re cognizers are in two groups of four: a- d and e-h . If you select one of these two options, the qualifier field will contain only those pattern recognizers.
Onl y one ra nge ca n be def ine d, and it can b e defi ned ov er on ly on e labe l, hence ove r only 32 chann els. The cha nnels do n’t have to be adjacent to each other .
6 Interpreti ng the Displ ay Introduction This chapter describes the Timing Waveforms and State Listing menus and how to interpret them. It also tells you how to use the fields in each of these menus to manipulate the displayed data so you can find your meas urem ent ans wers .
The wavef orms ar ea displays the data the timin g analyze r acquire s. The data is displayed in a format simila r to an oscilloscope with the horizontal axis representing time and the vertica l axis represe nting amplitude.
Markers (Timing) The Mark ers field allows yo u to specif y how th e X and O markers will be positioned on the timing data. The options are: • Off • Time • Patterns • Statistics Markers Off/ Sample Pe riod W h e nt h em a r k e r s a r eo f f t h e ya r en o tv i s i b l ea n dt h es a m p l er a t ei s displayed.
To position the markers, touch the appropriate field for marker selection. The field will turn light blue and can then be set using the knob. The Trig to X field controls the green marker and the Tr ig to O field controls the yellow marker. The trigger point is displayed with the red m arker.
Markers Pattern When the markers are set to pattern you c an specify patterns that the logic analyz er will place th e marker s on. You ca n also specify h ow ma ny occurr ence s of ea ch mar ker pa tter n the logic anal yzer lo oks for . This use of the markers allows you to find time between spec ific patterns in the acqu ired da ta.
Markers Statis tics W hen statistics are specified for markers, the logic analyzer displays: • Number of total runs • Numb er of va lid runs (run s where ma rker s were able to be place d on speci.
At ___ m arker The At X (or O) marker _______ fields allow y ou to select either the X or O marke rs. You ca n place th ese mar kers on th e wavef orms of any labe l and have the logic analyzer tell you what the pattern is.
The next field to the right of the At____ marker field will pop up when selected and show you all the labels assigned to the timing analyzer as shown below . s/Div (seconds- per-division) Field The seconds-per-division field allows you to c hange the time wind ow of the Timing W aveforms menu.
Delay Field The d elay fi eld al lo ws you t o ente r a delay . The de lay can b e eit her positive or negative. Delay allows you to place the time window ( selected by s/ Div) o f the acq uir ed dat a at cen ter scre en. The center tic mark at the horizontal ce nter and top of the waveforms area represents trigger + delay.
In Glitch mode the maximum delay is 25 seconds, which is controlled by m e m o r ya n ds a m p l ep e r i o d( 5 1 2X5 0m s ) . T h es a m p l er a t ei sa l s o dependent on the delay setting.
T h el i s t i n ga r e as h o w s t h ed a t at h es t a t ea n a l y z e ra c q u i r e s .T h ed a t ai s displayed in a listing format as shown below. This listing display shows you 1 6 of the possible 102 4 lines of data at one time. You can use the knob to roll the listing to the lines of interest.
State Listing Menu Fields The menu area contains fields that allow you to change the display parameters, place markers, and display listing measurem ent parameters. Marker s (St ate) The two markers (X & O) are horizontal lines that appear crossing the data area o f the dis pla y when the y are t urne d on.
Markers Off W hen the markers are off they are not displayed, but are still placed at the specified points in the data. If Stop measurement is on and the Stop measu reme nt cri teri a are pr esent i n the data , the me asur emen t will stop even though th e marker s are off .
Anoth er featur e of mar kers set to patterns is the Stop measur emen t when X-O ___ which is found in the Specify Patterns field. The options are: • Off • Less than • Greate r than • In range • Not in range This f eat ure is o nly ava il able w hen Co unt is se t to Tim e in the T rac e menu.
The Time X to O field will change according to the position of th e X and O markers. It displays the to tal time between the states marked by the X and O markers.
Timing/State Mixed Mode Display When both timing and state analyzers are on, you can display both the State Listing and the Timing Waveforms simultaneously as shown. The data in both parts of the display can be time corre lated as long as Count (State Tra ce men u) is set to Time.
State/S tate Mixed Mode Display When two state analyzers ar e on, the logic analyzer can display both state listings as shown in figure 6-16. The acquired data of both machines is interlaced. The State/State mixe d mode can be set up in either Listing 1 or Listing 2.
To display a two state mixed mode listing you must start with a single state listing. In this example, Listing 1 is the star ting point. The desired display is: • addres ses o f mach ine 1 • inver.
The pop-up will close a nd machine 2 will supp ly data for this label loca tio n on scr een. You now must spec ify what label you wan t from ma chine 2. The field to the left of the machine po p-up allows you to select a label from the labels assigned to machine 2.
When the pop-up a ppea rs, touch the "DATA" field. When you are finished selecting the machine and the label, touch Done to close th e original pop- up.
7 Using The Timing Analyzer Introduction In this chapter you will learn how to use the timing analyzer by setting up the logic analyzer to make a simple m easurement. We give you th e measurement results as ac tually measured by the logic analyzer, since you may not have th e same circuit available.
What Am I Going to Measure? After c onfi gurin g the lo gic a nal yzer a nd hoo king i t up to your circ uit under test, you will b e measuring the time (x) from wh en the RAS goes low to whe n the C AS goe s high , as sho wn be low.
3. Name Analy zer 1 "DRAM TEST" (optiona l) a .T o u c ht h ef i e l dt ot h er i g h to f Name:_ ____ __ of Analy zer 1. b. Using t he alph anum eric ke yboa rd pop -up, c hang e the na me of Analyz er 1 to "DRAM TEST." 4. Assig n pod 1 t o the tim ing a nal yzer .
Connecting the Probes At this point, if you had a target system with a 4116 DRAM m emory IC, you would c onnect the logic ana lyzer to you r system. Since you will be assign ing Pod 1 bit 0 to t he RAS label, yo u hook Pod 1 bit 0 to the memory IC pin connected to the RAS signal.
1. Display the Timing Format Specifica tion menu. a. Touch t he field se cond fro m the left in the u pper left co rner . b. Whe n the pop -up ap pear s, t ouch th e Forma t 1 field. 2. N ame tw o lab els, o ne R AS an d one C AS . a. Touch the top field in the label column.
3. Assig n the c hann els co nnec ted to th e input signals (Pod 1 bits 0 and 1) to the labels RAS and CAS respectively. a. Touch t he bit assignme nt field be low Pod 1 and to th e right of RAS. b. Any combination of b its may be assigned to this pod; however, you will want only bit 0 assigned to the RAS label.
Specifying a Trigger Condition To capt ure t he da ta and then place t he da ta of in ter est i n the cen ter o f the displ ay of t he tim ing wa vefo rm men u, you n eed to t ell the logic a na lyze r when to trigger.
Acquiring the Data Now th at you ha ve config ured and c onnecte d the logic ana lyzer , you acquire the d ata for y our measu rement by touchin g the Run field . The display sw itches to the T iming Wave forms m enu when t he logic analyz er starts acquiring data.
The RAS labe l shows yo u the R AS signal and the CAS lab el show s you the CAS signal. No tice the RAS signal goes low at or near the center of the waveform display area (horiz ontal center).
The Timing Waveform Menu The timing waveform menu differs from th e other menus you have u sed so far in this exercise. Besides displaying the acquired data, it has menu fiel ds th at yo u use t o cha ng e the wa y the a cqui red d ata i s dis pl ayed a nd fields that give you timing answers.
Display Resolution You get the best resolution by changing the seconds per division (s/Div) to a value th at disp lays o ne negati ve- going edg e of both th e RAS and CAS wavefo rms.
Making The Measurement What you want to know is how much time elapses between the time RAS goes low and the time C AS goes high again. You w ill use the X and O marker s to qui ckly f ind th e answer .
Finding the Answer Y o u ra n s w e rc o u l db ec a l c u l a t e db ya d d i n gt h e Trig to X and Tr ig to O times, but you don’t have to. The logic analyzer h as already calculated this a n s w e ra n dd i s p l a y si ti nt h eXt oOf i e l do nt h ed i s p l a y .
Summ ary You have just learned how to make a simple timing mea surement with the HP 16 510B lo gic analyz er. You h ave: • specified a timing analyzer • assigned pod 1 • assigned bits • assign.
8 Using The State Analyzer Introduction In this chapter you will learn how to use the state analyzer by se tting up the logic analyzer to make a simple state measurement. We giv e you the measurement results as ac tually measured by the logic analyzer, since you may not have th e same circuit available.
What Am I Going to Measure? You decid e to s tart w her e the mi crop roce ssor st arts when pow er is applied . We will de scribe a 6 8000 m icrop roce ssor; h owever, e very processor has similar start-up routines.
Your measurement, then, requires verification of the sequential addresses the micro processo r looks to and of t he data in RO M at t hese addr esses. If the res et v ector fetc h is c orre ct (in th is e xamp le), you will s ee t he followi ng list of num bers in H EX (defaul t base) whe n your m easuremen t results are display ed.
3. Name Analy zer 1 68 000ST ATE (optional) a .T o u c ht h ef i e l dt ot h er i g h to f Name: _ ____ ___ . b. When th e alphanu meric key boar d pop- up appea rs, touc h the appro priate k eys to c hange t he name to 6800 0STATE . c. Touch DONE when you finish entering the name.
Connecting the Probes At this point, if you had a target system with a 68000 microprocessor, you would conn ect th e logic an alyze r to your s ystem . Sinc e you have a ssi gned labels ADDR and DATA, you would hook the p robes to y our syste m accord ingly.
Configuring the State Analyzer N ow that yo u have con figured th e system, you are r eady to con figure the state analyzer. You will be: • Creating tw o names (lab els) for the inp ut signals • Assigning the channels conn ected to the input signals • Specifying the State (J) clock • Specifying a trigger conditio n 1.
b. When t he pop-u p appe ars , touch Modify Label . c. With the alphanumeric keypad, chang e the name of the label to ADDR. d. Tou ch DONE to close pop -up.
3. Assign Pod 1 bits 0 t hrough 1 5 to the label DATA . a. Touch t he bit assignme nt field be low Pod E1 an d to the right of DATA. You will see the following pop-u p. Any combination of bits may already be assigned to this pod; ho wever, you will want all 16 bits assigned to the DATA label.
4. Assign Pod E2 bits 0 through 15 to the label ADDR by re peating step 3. 5. Assign Pod E3 bits 0 through 7 to th e label ADDR. 6. Unassign any assign ed bits in the ADDR label under Pod E1. The State Format Specif ication menu should now look like that below.
Specifying the JC l o c k If you rem ember fr om "What’s a State An alyzer" in Fe eling Comfortable With Logic Analyzers , the state analyz er samp les the data u nder the contr ol of an exte rnal clo ck which is "syn chro nous" w ith your ci rcuit un der test.
b. In the p op-u p, to uch the field t o the ri ght of J . c. Touch the field with the arr ow pointing down to select a negative going e dge. 3. Turn off all other clocks (K-N) if any ar e on by repeating steps a throug h c using the Off option and then touch Done to close the pop- up.
The State Format Specif ication menu should look like that shown below. Figure 8-12. Format Specification Menu Using the State Analyzer HP 16510B 8 - 12 Front-Panel Reference.
Specifying a Trigger Condition To ca ptur e the da ta an d pla ce th e dat a of in ter est in the c enter o f th e d i s p l a yo ft h es t a t el i s t i n gm e n u ,y o un e e dt ot e l lt h es t a t ea n a l y z e rw h e n to trigger.
b. In the p op-u p, to uch the field t o the ri ght of t he TRI GGE R on fiel d. T his fi el d may eit her c on tain a or an ysta te . Anothe r pop-up a ppea rs sho wing you a list of "T RIGGER o n" opti ons. Options a through h are qualifiers that a llow you to assign a pattern for the trigger specification.
d. Touc h the fi eld labe led Done in the Seq uenc e Le vels p op-up. e. Touch th e field to the r ight of "a" unde r the la bel ADDR. f. With the pop- up key pad, touch t he 0 (zero) ke y until all zer oes appear in the disp lay space ab ove the keypa d.
Your trigger specification now states: "While storing anystate, trigger on "a" 1 times and then store a nystate." When the state analyzer is connected to your circuit and is acquir.
When yo u tou ch the Run fi eld a pop -up ap pear s nex t to it wi th the o ptio ns Single , Repetitive ,a n d Cancel . W ithout lifting yo ur finger from the scre en, mo ve it to t he fi eld la bel ed Single . Single will turn white. Figure 8-19. Acquiring Data Figure 8-20.
I fy o uw a n tt og ot ot h es t a t el i s t i n gm e n ub e f o r et a k i n gam e a s u r e m e n t , touch the f ield seco nd fro m the left at the to p of the scr een.
The State Listing The state listing displays three columns of numbers as shown : The first column of n umbers are the state line number locations as they relate to the trigger point. The trigger state is on the line 0 in the vertical center of the list area.
Finding the Answer Your answer is now found in this listing of the states +0000 throu gh +0004. The 68000 a lways reads address loc ations 0, 2, 4, and 6 to f ind the stack pointer location and memory location for the instruction it fetches after power- up.
So far you h ave verifi ed that the m icropro cessor has perf ormed the c orrect reset vector sea rch. The next thing you must verify is whether the micr oproce ssor add resses the cor rect locatio n in RO M that it was instructed to address in state 4 and whether the data is correct in this ROM location.
Summ ary You have just learned how to make a simple state measurement with the HP 16 510B L ogi c Analyz er. You h av e: • specified a state analyzer • learne d which pr obes to co nnect • assig.
9 State Compare Menu Introduction State c ompa re is a s oftw are pos t-p roce ssi ng fea ture t hat pro vide s the ability to do a bit by bit comparison between the acquired state data listing and a compar e data i mage . You can view the acqu ired da ta and the compare image separately.
Accessing the Compare Menu The Compare menu is accessed b y selecting the field dire ctly to the right of the Module select field in the upp er left corner of the screen. When the pop-up a ppea rs yo u will see t he opti ons Co mpar e 1, Compa re 2 or bo th depe nding o n which an alyze r is a s tat e analy zer.
The controls that roll th e list in all three menus, the normal State Listing, the Compare Listing, and the Difference Listing are synchron ized. This means that when you change the current row positi.
Bit Editing of the Compare Image Bit editing allows you to modify the values of individual bits in the compare image or specify th em as don’t co mpare bits. The bit editin g fields are located in the center of the Compare Listing display to the right of the listing number field (see figure 9-1).
Masking Channels in the Compare Image The channel masking function allows you t o specify a bit, or bits in each label that yo u do not w ant compa red. This ca uses the correspon ding bits in all states to be ignored in the comparison. The compare data image itself remains u nchang ed on the d isplay.
Specifying a Compare Range The Compare Range fun ction allows you to d efine a subset of the total num ber of st ates in t he com pare im age t o be us ed in th e comp ar ison . The range is speci fied by setting start and stop boundaries. Only bits in states (lines) on or between the boun daries are c ompared again st the acqu ired data.
Repetitive Comparisons with a Stop Condition When you do a comparison in the repetitive trace mode, a stop condition should be specified. The stop condition is either "Stop Measurement" when Compar e is "Equal," "Not Equ al" or "Off.
Note Yo u may al so sp eci fy a sto p measu re ment ba sed o n time b etw een th e X and O markers in the Co mpare or Difference Listing menus. This is available o nly when time tags a re on.
10 State Waveform Menu Introduction The State Waveform Menu allows you to view state data in the form of w a v e f o r m si d e n t i f i e db yl a b e ln a m ea n db i tn u m b e r .U pt o2 4w a v e f o r m s can be displayed simultaneously. Only state data from the current state machine can be displayed as waveforms in the State Waveforms m enu.
Selecting a Waveform Y o uc a nd i s p l a yu pt o2 4w a v e f o r m so ns c r e e na to n et i m e .E a c h waveform is a representation of a predefined label. To selec t a waveform, touch t he blue b ar (field) o n the left side of the w avefo rm portion of the disp lay (s ee f igure 1 0-1) .
Each w avef orm ca n disp lay an y one o r all bi ts (cha nnel s) of a l abel or i t can be turned off. The specific bit or bits of a label that will be displayed depe nds o n what Channel Mode is currently displayed when you select the l abel .
If Over lay is currently displayed, all bits of the label are inserted in a single wav eform to form a c ompo site wavef orm (se e figure 10 -5). In the above figure, label A has all of its bits specified to be overlaid in the waveform display. The on-screen indication for the Overlay mode is All following the label name.
Replacing Waveforms You can re place a currently d isplayed w avefor m (label) with an other one of the p rede fin ed wav efo rms (l abels ). To r epl ace one w avef orm w ith anothe r, pla ce th e curs or on th e wavef orm yo u wish to re pla ce us ing the knob.
Selecting Samples pe r Division You can specify the samples per division by entering the number of states per division either with a keypad or the kn ob. The range is from 1 to 10 4 per division. Delay from Trigger You can specify the delay from trigge r by specifying the number of states from th e trigge r.
11 State Chart Menu Introduction The State Chart Menu allows you to build X-Y plots of label activity using state data. The Y-axis always represe nts data values for a specified label. You can select whe ther the X-axis represents sta tes (i.e., rows in the State List) or the data values for another label.
Scaling the Axes Either axis can be sc aled by using the vertical or horizontal min (minimum) or max (max imum) value fields. Whe n you select any one of the min or max fields a pop up a ppea rs in w hich yo u spe cify t he act ual minimum and m aximum va lues that will be disp layed on the cha rt (see figure 11 -1).
The Label Value vs. States Chart The Label Value vs. State chart is a plot of label activity versus the memory location in which the label data is stored.
The Label Value vs. Label Value Chart When labels are assigned to both axis, the chart shows how one label varies in relation to the other for a particular state tra ce recor d. Label values are always plotted in ascending order from the bottom to the top of the cha rt an d in asc endin g orde r from le ft to ri ght ac ros s the ch art.
X&OM a r k e r s for Chart When State is specified for the X-axis, X and O m arkers are available which can be moved horizontally which are synchronized with the X and O markers in the normal State Listing. To select the marker mode for Chart (if it is not presently displayed), select the Range field in the top center of the display.
Marker Options The marker options in the State Chart menu depend on what Count is set to in the State Listing menu. When Co unt i s set to Off the Cha rt ma rker s can b e set to: • Off • Pattern .
12 Using the Timing/State Ana lyzer Introduction In this chapter you will learn how to use the timing and state analyzers interactively by setting up the logic analyzer to make a s imple meas urem ent. W e give y ou th e meas ure ment re sult s as ac tual ly meas ure d by the lo gic analyz er, since yo u may no t have t he same circ uit available .
Problem Solving with the Timing/State Analyzer In this example assume you have designed a microprocessor controlled circuit. You hav e complete d the hardwa re, and the so ftware d esigner ha s c o m p l e t e dt h es o f t w a r ea n dp r o g r a m m e dt h eR O M .
How Do I Configure the Logic Analyzer? In orde r to make th is measur ement, yo u must c onfigur e the logic a nalyzer as a state analyzer bec ause you want to trigger on a specific state (8930). You also want to verify that the addresses and data are correct in the state s of this routine.
Configuring the State Analyzer N ow that yo u have con figured th e system, you are r eady to con figure the state analyzer. Config ure the State For mat Specific ation ( Format 1 )a ss h o w n : Configure the State Trace Specification ( Trace 1 )a ss h o w n : Figure 12-2.
Connecting the Probes At this point, if you had a target system with a 68000 microprocessor, you would conn ect th e logic an alyze r to your s ystem . Sinc e you have a ssi gned labels ADDR and DATA, you would hook the p robes to y our syste m accord ingly.
As you compare the state listing (shown below), you notice the data at a d d r e s s8 9 3 2i si n c o r r e c t .N o wy o un e e dt of i n do u tw h y . Your first assumption is that incorrect data is stored in this memory location. Assume this routine is in ROM sin ce it is part of the operating system for y our cir cuit.
Now it’s time to look at the h ardware to see if it is causing incorrect data when the microprocessor rea ds this memory a ddress. You decide y ou want to see what is happening on the address and data buses during this routine in the time domain. In order to see the time domain, you need the tim ing analyzer.
How Do I Re-configure the Logic Analyzer? In order to mak e this me asure ment, you m ust re-c onfig ure the lo gic analyze r so Analyz er 2 is a timin g analyze r. You leave Analyzer 1 a s a state analyz er since y ou will use the state ana lyzer to tr igger on ad dress 8930.
Configuring the Timing Analyzer Now that yo u have con figured th e system, you are r eady to con figure the timing analyzer. Configure the Timing Format Specification ( Format 2 )a ss h o w n : Configure the timing Trace specification ( Trac e 2 )a ss h o w n : Figure 12-6.
Setting the Timing Analyzer Trigger Your timing measurement requires the timing analyzer to display the timing wav efor ms prese nt on the buses w hen the rou tine is runn ing.
Time Correlating the Data In order to time correlate the data, the logic analyzer must store the timing relationships between states. Since the timing analyzer sa mples async hron ousl y and the st at.
The Timing Waveform Menu After pods 4 and 5 are co nnec ted, you c an re -acquir e the d ata. Howe ver, firs t ass ign th e label s in the Timin g Wave form menu. Displaying the Waveforms Disp lay the Timing Waveform menu. Touch the long blue field on the left side of the s creen.
This is no t the orde r we want th em in. We wa nt LDS befo re UDS. T o correct this, follow these steps: 1. Use the kn ob to plac e the c urs or on the la bel L DS in the l ong blue label field. 2. Touc h the field la beled D elete. Thi s erases LDS.
LDS appears in the blue label area in the correct position . Now we want to p ut ADDR and DATA i n the long b lue labe l are a. Position the cu rsor on R/W in the long b lue label field. Touch ADDR under La bels in th e pop- up. Sinc e ADDR has e ight bits assign ed to it, eight l abels app ear in the labe l field, on e for each bit, as shown.
This also occurs fo r DATA, a s shown: If you want to see the waveforms of each bit, you would leave the display as it is. However, this makes the wavef orm display ver y crowded.
2. Touc h the filed l abel ed Channel Mode Sequential . 3. In the new pop-up, touch the field labeled Ov erl ay . Figure 12-17. Chann el Mode Sequential Menu Figure 12-18.
4. To uch the ADDR label field under Labels. 5. To uch the DAT A label fi eld un der La bel s. The scree n shoul d look like that shown below. In the long blue label field ADDR an d DATA have "all" nex t to them to show that the bits are overlapped.
Finding the Answer As you loo k at the overlapping waveforms, yo u notice there are transitions on the data lin es during the r ead, indicating the d ata is unstable, which is the pro bable c aus e of the pr oblem y ou’v e been lo oking f or. You have found what is causing the problem in this rou tine.
13 Using a Printer Setting Printer Configuration All pr inter para meters are se t in the System Confi guration m enu. I f you have just conn ected y our pr inter an d are un sure of how to set the configuration, refer to the HP 16 500A Referen ce Manu al chapter entitled Connecting a Printer.
If you are in th e State Listing , a slig htly different pop -up will appear, like the one sh own in fi gure 13- 2. The pop-up contains t hree fields, Cancel , Pr int Scree n ,a n d Print All . Printing On- Screen Data If you want a hard copy re cor d of the scree n, to uch the Print field and then the Pri nt Scr een f ield fro m the pop-u p.
14 Microprocessor Spe cific Meas urements Introduction This chapter contains information a bout the optional accessorie s available for mic ropr oces sor s peci fic me asu reme nts . In de pth mea sur emen t descriptions are in the operating notes that come with e ach of these accessories.
The inverse assembler file is a software routine that will display captured information in a specific microprocessor’s mnemonics. The DATA field in the state listing is replace d with an inverse assembly field ( see Figure 14-1).
Z80 CPU Pac kage : 40- pin DIP Accessor ies Re quire d: HP 103 00B Preproc essor HP 10269C Ge nera l Purp ose Prob e Inter face Maximum Clock Speed: 10 MHz clock input Signal Line Loading: Maximum o f.
NSC 800 CPU Package : 40- pin DI P Accessor ies Re quire d: HP 103 04B Preproc essor HP 10269C Ge nera l Purp ose Prob e Inter face Maximum C lock Speed : 4 MHz cloc k input Signal Line Loadin g: Maxi.
8085 CPU P acka ge : 40-pin DI P Accessor ies Re quire d: HP 103 04B Preproc essor HP 10269C Ge nera l Purp ose Prob e Inter face Maximum C lock Speed: 6 MH z clock outpu t (12 MHz cloc k input) Signa.
8086 or 808 8 CPU Packa ge: 40- pin DI P Accessor ies Re quire d: HP 103 05B Preproc essor HP 10269C Ge nera l Purp ose Prob e Inter face Maximum Clock Speed: 10 MHz clock input (at CLK) Signal Line L.
80186 or 8018 8 CPU Package : 68-co nta ct LCC Accessor ies Re quire d: HP 103 06B Preproc essor HP 10269C Ge nera l Purp ose Prob e Inter face Maximum C lock Speed: 8 MH z clock outpu t (16 MHz cloc .
80286 CPU Package : 68-co nta ct LCC or 68-pi n PGA Accessor ies Re quire d: HP 103 12B Preproc essor HP 10269C Ge nera l Purp ose Prob e Inter face Maximum Clock Spee d: 10 MHz c loc k output ( 20 MH.
80386 CPU Package : 132-p in PGA Accessories R equired :HP 1 0314B Preproc essor HP 10 269C G enera l Purpose Pr obe In terfa ce Maximum Clock Spee d: 20 MHz c loc k output ( 40 MHz cl ock inp ut) Sig.
6800 or 680 2 CPU Packa ge: 40- pin DI P Accessor ies Re quire d: HP 103 07B Preproc essor HP 10269C Ge nera l Purp ose Prob e Inter face Maximum C lock Speed : 2 MHz cloc k input Signal Line Loading:.
6809 or 6809E CPU Packa ge : 40-pin DI P Accessor ies Re quire d: HP 103 08B Preproc essor HP 10269C Ge nera l Purp ose Prob e Inter face Maximum C lock Speed : 2 MHz cloc k input Signal Li ne Loading.
68008 CPU Package : 40- pin DI P Accessor ies Re quire d: HP 103 10B Preproc essor HP 10269C Ge nera l Purp ose Prob e Inter face Maximum Clock Speed: 10 MHz clock input Signal Line Lo ading: Maximum .
68000 and 68010 (64-pin DIP) CPU Packa ge: 64- pin DI P Accessor ies Re quire d: HP 103 11B Preproc essor HP 10269C Ge nera l Purp ose Prob e Inter face Maximum Clo ck Speed: 12.
68000 and 68010 (68-pin PGA) CPU Pac kage : 68- pin PGA Accessor ies Re quire d: HP 1 0311 G Prep rocessor Maximum Clo ck Speed: 12.5 MHz cloc k input Signal Line Loading: 100 K Ω +1 0p Fo na n yl i.
68020 CPU Package : 114-p in PGA Accessor ies Re quire d: HP 1 0313 G Maximum Clock Speed: 25 MHz clock input Signal Line Loading: 100 K Ω +1 0p Fo na n yl i n e Microprocessor Cycles Identified: Us.
68030 CPU Package : 128-p in PGA Accessor ies Re quire d: HP 1 0316 G Maximum C lock Speed : 25 MHz inp ut Signal Line Loading: 100 K Ω plus 18 pF on a ll lin es exce pt DS ACK0 and DSACK1.
68HC11 CPU Packa ge : 48-pi n dual -in -lin e Accessor ies Re quire d: HP 1 0315 G Maximum Clock Sp eed: 8. 4 MHz input Signal Line Loading: 100 K Ω plus 12 pF on all li nes Microprocessor Cycles Id.
Loading Inverse Assembler Files You load the in verse assembler file by loading the appropriate configuration file. Loading the configuration file automatically loads the inverse assembler file. Selecting the Correct File Most inverse assembler disks contain more than one file.
Connecting the Logic Analyzer Probes T h es p e c i f i cp r e p r o c e s s o ra n di n v e r s ea s s e m b l e ry o ua r eu s i n gd e t e r m i n e s how you con ne ct the lo gic a nal yze r probe s.
Some of th e prep roce ss ors and /or th e mic roproc ess ors un der tes t do not provide enough status information to disassemble the data correctly. In this case, you will need to spec ify additional information (i.e. tell the logic analyz er what state con tains th e first wo rd of an o pcod e fetch ).
A Instal lin g New Log ic An alyze r Boar ds into the Mainframe Introduction This appendix explains, how to initially insp ect the HP 16510B State /Tim ing Modu le, how t o prep are it f or use, stora ge and s hipm ent. Also included are procedures for module installation.
Probe Cable Installation The HP 16510B State/Timing Mod ule comes with prob e cables installed by the factory. If a cable is to be switched or replaced, refer to "Probe Cable Replacement" in S ection VI of the HP 16510B Ser vice Manu al .
Procedure a. Tur n the fro nt and re ar panel po wer switc hes off , unplug power c ord and d isconn ect any in put B NCs. b. Starting from the top , loosen thumb screws on filler panel(s) and card(s ). c. Starting from th e top , begin pulling card(s) and fille r panel(s) out half way.
d. Lay t he cabl e(s) fla t and p oint ing o ut to the r ear of th e card . See figu re A-2. e. Slide the a nalyz er car d approx imately h alf way into th e card c age. f. If yo u hav e more a nalyz er car ds to in sta ll rep eat ste p d and e. Figure A-2.
g. Fir mly se at bott om car d into bac kpl ane co nnect or. Keep applying pressure to the center of card endplate while tightening thumb screws finger tight . h. Repeat for all cards and filler panels in a bottom to top order. See figu re A-3. i. Any filler panels that are not used should be kept for future use.
Operating Environment The operating environment is listed in "General Characteristics" in Append ix C of th is manua l. Note should be made of th e non-cond ensing humidity limitation. C ondensation within the instrument can cause poor operation or malfunction.
Packaging The follow ing gener al instruction s should be u sed for rep acking the module with commercially available materia ls. • Wrap module in anti-static plastic. • Use a strong shipping container. A double-wall carton made of 350 lb. test mater ial is adequ ate.
B Error M essage s This appendix lists the error messages that require corrective action to rest ore pr oper o pera tion of t he logic a na lyze r. Ther e ar e seve ral me ss ages that you will see that are mere ly advisories and are not listed her e.
No labels specified . Indica tes there are no labels to which to assign symbols. (x) Occurrences Remaining in Sequence (y) . Indicates the logic analyzer is waiting for (x) number of occurrences in sequence level (y) of the state trac e specif ica tion b efor e it can go on t o th e next seq uenc e level .
exce eds 41. 493 ms . It ma y be po ssibl e to a dd a "dum my" st ate to the machine’s trigger specification that is closer in time to the arm signal. (x) Transitions Remaining to Post Store . Indi cat es the num ber of transitions required until memory is f illed and acquisition is complete.
C Specific ation s and Cha racter istics Introduction This appendix lists the specifications, operating characte ristics, and supple me ntal c hara cte rist ics o f the HP 1651 0B Logi c Anal yzer Mo dule. Specifications Probes Minimum Swing : 600 m V pea k-to- peak .
Timing Mode Minimum Detectable Glitch: 5 ns wide at th e threshold. Operating Characteristics Probes Input RC: 100 K Ω± 2% shu nted by a pp roxim ate ly 8 pF a t the p robe tip. TTL Threshold Preset : +1.6 volts. ECL Threshold Preset: − 1.3 volts.
Measurement Configurations Analyzer Configurations: Analyzer 1 Analyzer 2 Timi ng Off Off Timing State Off Off State Timi ng State State Timing State State Off Off Channel Assignment: Each gro up of 16 c hann els (a p od) ca n be a ssign ed to Analy zer 1, An alyzer 2, o r remain un assigned.
Range Recognize rs: Recognizes data which is numerica lly between or on two specif ied pattern s (ANDed c ombinatio n of 0s and/or 1s). One ra nge term is available and is assigned to the first state analyze r turned on.
Symbols Pattern Symbols: User can define a m nemo nic for the s pecific bit pattern of a labe l. When dat a displ ay is SYMB OL, mne monic is display ed wher e the bit pattern occurs. Bit patter n can include 0s, 1s, and don’t cares. Range Symbols: User can defi ne a mnemo nic c overi ng a range o f value s.
Wave form Di splay Sec/div: 10 n s to 100 s; 0.01% resolution. Delay: − 25 00 s to 25 00 s; pr ese nce of d ata d epende nt on t he nu mber o f transitions in data between trigger and trigger plus delay (transitional timing). Accumulate: Waveform d isplay is not erase d between s uccessive acquisitions.
Measurement and Display Functions Autoscale (Timing Analyze r Only) Autoscale searches f or and displays channels with activity on the pod s assigned to the timing analyzer. Acquisition Specifi cations Arming: Each anal yze r can be arm ed b y the run k ey, t he ot her an aly zer, or the In termo dule Bu s.
Marker Functions Time I nt er val : The X and 0 mar kers me asure th e time inter val betwe en one point on a timing waveform and trigger, two point s on the same timing waveform, two points on different waveforms, or two state s (time tagging on).
Auxiliary Power Power Through Cable s: 2/3 a mp @ 5V max imu m per ca ble . Cur ren t Dra w Per C ard : 2 amp @ 5 V maximu m per H P 16510 B Operating Environments Temperature : Instru ment, 0 to 5 5 ° C( + 3 2t o1 3 1 ° F). Probe lead sets and cable s, 0 t o 65 ° C( + 3 2t o1 4 9 ° F).
Index A absolute symb ol offs et 5-36 Acces sin g the Compa re Me nu 9-2 Accessing the State Chart Menu 11-1 Accessing the State Waveform Menu 10-1 Accumulate Mode C-6, 6 -6 Acquisition Fields (State .
pulse width C-1 qualifier C-3 repetition rate C-1 slave 5-2 5 Specifying the J 8-10 Clock P eri od 5-27 clocks state C-3 Comp are Im ag e Bit Editing of the 9-4 Creating a 9-3 Masking C hannels i n th.
F Format Specific ation 5-8 State 5-8 Timing 5- 8 Format Specification menu 5-7 Full Qualification Specifica tion 5-45 G gene ral p urpo se prob ing 2-3 Glitch Acquisition Mode C-5, 5-31 minimum detec.
Pattern 6-13 States 6-15 Statistics 6-15 Time 6- 14 marker s (Ti ming ) Off 6-3 Pattern 6-5 Statistics 6-6 Time 6 -3 master clock 5-25 / 5-26 maximu m inp ut voltag e 2 -8 meas urem ent s microp roce .
System Level 5-1 Timing Format Specification 5-8 Timing Tr ace Spe cifica tion 5-27 Timin g Wave form s 6-1, 7-1 0 Trace S pecif ica tion 5-7 micr opro ce ssor meas urem ents 14-1 micro proc ess or su.
minimu m input over drive C-2 minimu m swing C- 1 pod assembly 2-4 threshold a ccurac y C -1 threshold ran ge C-2 threshold setting C-2 TTL th re sho ld pres et C-2 prob ing general p urpo se 2 -3 HP .
Storage Qualifier 5-49 Symbo l Name 5- 17 Symbol Of fse t 5-36 Symbol Ta ble 5-14 Lea vin g the 5-20 Symbol Wid th 5 -17 symbols C-5 , 5-14 base 5- 15 label 5-15 pattern C-5, 5- 18 range C-5 , 5-18 / .
Product Warranty This Hewlett-Pac kard pro duct ha s a warran ty against def ects in mate rial a nd workma nshi p for a p eriod o f one ye ar fro m date of shipm ent . During warranty period, Hewlett-Packar d Company will, at its op tion, either repair or repla ce produ cts tha t pro ve to be de fective.
Exclusive Remedies THE REMEDIES PROVIDED HEREIN ARE T HE BUYER’S SOLE AND EXCLUSIVE REMEDIES. HE WLETT- PACKARD SHALL NOT BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL I NCIDENTAL, OR CONSEQUENTIAL DAMAGES, WHE THER BASED ON CONTRACT, TORT, OR ANY OTHER LEGAL THEORY.
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