SupermicroメーカーMBD-X8DTL-I-Oの使用説明書/サービス説明書
ページ先へ移動 of 97
X8DTL-3 X8DTL-i USER’S MANUAL Revision 1.1b X8DTL-3F X8DTL-iF.
The information in this User ’s Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates.
Preface About this Manual This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the X8DTL-3/ X8DTL-i/X8DTL-3F/X8DTL-iF motherboard.
Danger/Caution: Instructions to be strictly followed to prevent catastrophic system failure or to avoid bodily injury . W arning: Important information given to ensure proper system installation or to prevent damage to the components. Note: Additional Information given to differentiate various models or to ensure correct system setup.
Contacting Supermicro v Contacting Supermicro Headquarters Address: Super Micro Computer , Inc. 980 Rock Ave. San Jose, CA 95131 U.S.A. T el: +1 (408) 503-8000 Fax: +1 (408) 503-8008 Email: marketing@supermicro.com (General Information) support@supermicro.
X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual vi T able of Contents Preface Chapter 1 Introduction 1-1 Overview ......................................................................................................... 1-1 Checklist ............
T able of Contents vii NIC1/NIC2 LED Indicators ....................................................................... 2-18 Overheat (OH)/Fan Fail/PWR Fail/UID LED ............................................ 2-19 Power Fail LED .....................
X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual viii Chapter 3 Troubleshooting 3-1 T roubleshooting Procedures ........................................................................... 3-1 Before Power On .......................................
Chapter 1: Introduction 1-1 Chapter 1 Introduction 1-1 Overview Checklist Congratulations on purchasing your computer motherboard from an acknowledged leader in the industry . Supermicro boards are designed with the utmost attention to detail to provide the highest standards in quality and performance.
1-2 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF Image Note: The drawings and pictures shown in this manual were based on the latest PCB Revision available at the time of publishing of the manual. The motherboard you’ve received may or may not look exactly the same as the graphics shown in the manual.
Chapter 1: Introduction 1-3 Notes The DOM Power connector (JWF1) and the W ake-On-Ring header (JWOR), 1. are supported by the PCB Rev . 2.01 or a newer version board only . SAS Ports, SAS jumpers, the I-Button, and the LSI 1068E chip are available 2. on the X8DTL-3/-3F only.
1-4 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Jumpers not indicated are for test purposes only. • " " indicates the location of Pin 1. • When LE1 is on, the onboard power connection is on. Make sure to unplug the • power cables before removing or installing components.
Chapter 1: Introduction 1-5 X8DTL-3/X8DTL-3F/ X8DTL-i/ X8DTL-iF Quick Reference Jumper Description Default Setting JBT1 CMOS Clear Open (Normal) JI 2 C1/JI 2 C2 SMB to PCI/PCI-E Slots Open/Open (Disab.
1-6 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Motherboard Features CPU T wo Intel • ® 5500/5600* Series (LGA 1366) processors, each processor support- ing two full-width Intel QuickPath Interconnect (QPI) @6.4 GT/s with a total of up to 51.
Chapter 1: Introduction 1-7 ACPI Features Slow blinking LED for suspend state indicator • Mai n s wit ch o verrid e me chan ism • AC PI Po wer Ma na g em en t • K e y b oa rd W a k e u p f r om .
1-8 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Block Diagram of the 5500 Chipset Note: This is a general block diagram. Please see the previous Mother- board Features pages for details on the features of each motherboard.
Chapter 1: Introduction 1-9 1-2 Chipset Overview Bui lt up on th e fu nct io nali t y and t he c apa bil it y of th e 55 0 0 pl at fo rm, t he X8 DTL - 3 / X8 DTL - i/ X8DTL - 3 F / X8 DTL - i F mot h.
1-10 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual 1-3 Special Features Recovery from AC Power Loss BIOS provides a setting for you to determine how the system will respond when AC power is lost and then restored to the system.
Chapter 1: Introduction 1-1 1 not if y t he u ser o f ce r t ain sy stem even ts. Fo r examp le, you c an a ls o co n fi gure S u p e r o Do c t o r t o p r o v i d e y o u w i t h wa rn in gs w h e n t h e s y s t em t e m p e r a t u r e, CP U temp er ature s, vol tag es an d fan s pee ds go b eyond a p re - d e fi ned range.
1-12 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual WOL capability . In addition, an onboard LAN controller can also support WOL without any connection to the WOL header . The 3-pin WOL header is to be used with a LAN add-on card only . Note : W ake-On-LAN requires an A TX 2.
Chapter 1: Introduction 1-13 control capability and a processor interrupt system. Both UARTs provide legacy speed with baud rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which support higher speed modems.
1-14 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Notes.
Chapter 2: Installation 2-1 Chapter 2 Installation 2-1 Static-Sensitive Devices Electrostatic Discharge (ESD) can damage electronic com ponents. T o prevent dam- age to your system board, it is important to handle it very carefully . The following measures are generally suf fi cient to protect your equipment from ESD.
2-2 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Locate the matching mounting holes on the chassis. Align the mounting holes 3. on the motherboard against the mounting holes on the chassis. Install standoffs in the chassis as needed. 4. Install the motherboard into the chassis carefully to avoid damage to mother- 5.
Chapter 2: Installation 2-3 2-3 Processor and Heatsink Installation When handling the processor package, avoid placing direct pressure on the label area of the fan. Notes: Always connect the power cord last and always remove it before adding, re- 1. moving or changing any hardware components.
2-4 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Socket Keys After removing the plastic cap, 1. using your thumb and the index fi nger , hold the CPU at the north and south center edges. Align the CPU key , the semi- 2. circle cutout, against the socket key , the notch below the gold color dot on the side of the socket.
Chapter 2: Installation 2-5 Installing a CPU Heatsink Screw#1 Screw#2 Do not apply any thermal 1. grease to the heatsink or the CPU die because the required amount has already been ap- plied. Screw#1 Screw#2 Install Screw#1 Place the heatsink on top of the 2.
2-6 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Removing the Heatsink War ni ng: We do not r ec om men d that t he C PU or t he heat si nk be re - m o v e d .
Chapter 2: Installation 2-7 X8DTL Series Rev. 2.01 2-4 Installing and Removing the Memory Modules Note : Chec k the S upe r mic ro we b site fo r re co mme nde d me mor y m odul es. CAUTI O N E x e r ci s e e xt r e m e ca r e w h e n i n s t a l l i n g o r r e m o v i n g D I M M mo dul es to p revent a ny pos si ble d ama ge.
2-8 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Memory Support The X8DTL-3/-i/-3F/iF supports up to 96 GB Registered ECC or up to 24 GB Unbuf- fered ECC/Non-ECC DDR3 1333 MHz/1066 MHz/800 MHz in six DIMMs. Note: Memory Speed support depends on the type(s) of CPU(s) installed on the motherboard.
Chapter 2: Installation 2-9 Memory Support for the Motherboard w/5600 Processors Installed 1.5V Registered DIMMs (for the PCB R2.01 or a later version board only) • 1.5V RDIMM Population for a motherboard w/5600 Processors Installed DIMM Slots per Channel DIMMs Populated per Channel DIMM T ype (Reg.
2-10 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Possible System Memory Allocation & A vailability System Device Size Physical Memory Remaining (-Available) (4 GB T otal System Memory) Firmware Hub fl ash memory (System BIOS) 1 MB 3.99 GB Local APIC 4 KB 3.
Chapter 2: Installation 2-1 1 JPW3 JPW2 JBT1 JPI2C COM1 I-SATA0 I-Button JPS1 JWD JPL2 JPL1 JF1 SP1 1 JWOL LE1 D20 JBAT1 JP3 JL1 JPS2 JOH1 JPB JP5 J16 JD1 CPU1 FAN Slot3 PCI-E 1.0 x4 7HG 5ADG 7TN100C W8379 W8352 Slot6 PCI-E 2.0 x8 (in x16 Slot) JI2C2 SAS6 SAS5 SAS4 SAS3 SAS2 SAS1 Slot4 PCI-E 2.
2-12 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual A TX PS/2 Keyboard and PS/2 Mouse Ports The A TX PS/2 keyboard and PS/2 mouse are located next to the Back Panel USB Ports 0~1 on the moth- erboard. See the table at right for pin de fi nitions.
Chapter 2: Installation 2-13 1. Backpanel USB 0 2. Backpanel USB 1 3. Front Panel USB 2/3 4. Front Panel USB 4/5 5. Front Panel USB 6 Universal Serial Bus (USB) T wo Universal Serial Bus ports (USB 0 and USB 1) are located on the I/O back panel.
2-14 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Serial Ports T wo COM connections (COM1 & COM2) are located on the motherboard. COM1 is located on the Backplane IO panel. COM2 is located next to the onboard buzzer to provide additional serial connection support.
Chapter 2: Installation 2-15 1. LAN1 2. LAN2 3. LAN5 (X8DTL-3F/iF only) Ethernet Ports T wo Ethernet ports (LAN 1/LAN2) are located at on the IO backplane. In addition, a dedicated LAN is also lo- cated on the X8DTL-3F/-iF to provide KVM support for IPMI 2.
2-16 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual 2. Front Control Panel JF1 contains header pins for various buttons and indicators that are normally lo- cated on a control panel at the front of the chassis. These connectors are designed speci fi cally for use with Supermicro server chassis.
Chapter 2: Installation 2-17 Po we r Button OH/Fan Fail LED 1 NIC1 L ED Re set Butto n 2 Po we r Fa il LED HDD LED Po we r LED Rese t PWR Vcc Vcc Vcc Vcc/Front UID LED Gr ound Gr ound 19 20 Vcc X Gr ound NMI X Vcc NIC2 LED Power LED Th e Power LED c o nne ct io n is lo c ated o n p i n s 1 5 a n d 16 o f J F1.
2-18 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Po we r Butto n OH/Fan Fail LED 1 NIC1 L ED Rese t Butto n 2 Po we r Fa il LED HDD LED Po we r LED Rese t PWR Vcc Vcc Vcc Vcc/Front UID LED Gr.
Chapter 2: Installation 2-19 Po we r Butto n OH/Fan Fail LED 1 NIC1 L ED Rese t Butto n 2 Po we r Fa il LED HDD LED Po we r LED Rese t PWR Vcc Vcc Vcc Vcc/Front UID LED Gr ound Gr ound 19 20 Vcc X Gr ound NMI X Vcc NIC2 LED Power Fail LED Th e Power Fail LE D co nne ct io n is lo ca ted on p ins 5 an d 6 of JF1 .
2-20 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Po we r Butto n OH/Fan Fail LED 1 NIC1 L ED Rese t Butto n 2 Po we r Fa il LED HDD LED Po we r LED Rese t PWR Vcc Vcc Vcc Vcc/Front UID LED Gr ound Gr ound 19 20 Vcc X Gr ound NMI X Vcc NIC2 LED Power Button The Power Button connection is located on pins 1 and 2 of JF1.
Chapter 2: Installation 2-21 JPW3 JPW2 JBT1 JPI2C COM1 I-SAT A0 I-Button JPS1 JWD JPL2 JPL1 JF1 SP1 1 JWOL LE1 D20 JBAT1 JP3 JL1 JPS2 JOH1 JPB JP5 J16 JD1 CPU1 FAN Slot3 PCI-E 1.0 x4 7HG 5ADG 7TN100C W8379 W8352 Slot6 PCI-E 2.0 x8 (in x16 Slot) JI2C2 SAS6 SAS5 SAS4 SAS3 SAS2 SAS1 Slot4 PCI-E 2.
2-22 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual JPW3 JPW2 JBT1 JPI2C COM1 I-SAT A0 I-Button JPS1 JWD JPL2 JPL1 JF1 SP1 1 JWOL LE1 D20 JBAT1 JP3 JL1 JPS2 JOH1 JPB JP5 J16 JD1 CPU1 FAN Slot3 PCI-E 1.0 x4 7HG 5ADG 7TN100C W8379 W8352 Slot6 PCI-E 2.
Chapter 2: Installation 2-23 JPW3 JPW2 JBT1 JPI2C COM1 I-SAT A0 I-Button JPS1 JWD JPL2 JPL1 JF1 SP1 1 JWOL LE1 D20 JBAT1 JP3 JL1 JPS2 JOH1 JPB JP5 J16 JD1 CPU1 FAN Slot3 PCI-E 1.0 x4 7HG 5ADG 7TN100C W8379 W8352 Slot6 PCI-E 2.0 x8 (in x16 Slot) JI2C2 SAS6 SAS5 SAS4 SAS3 SAS2 SAS1 Slot4 PCI-E 2.
2-24 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual JPW3 JPW2 JBT1 JPI2C COM1 I-SAT A0 I-Button JPS1 JWD JPL2 JPL1 JF1 SP1 1 JWOL LE1 D20 JBAT1 JP3 JL1 JPS2 JOH1 JPB JP5 J16 JD1 CPU1 FAN Slot3 PCI-E 1.0 x4 7HG 5ADG 7TN100C W8379 W8352 Slot6 PCI-E 2.
Chapter 2: Installation 2-25 JPW3 JPW2 JBT1 JPI2C COM1 I-SAT A0 I-Button JPS1 JWD JPL2 JPL1 JF1 SP1 1 JWOL LE1 D20 JBAT1 JP3 JL1 JPS2 JOH1 JPB JP5 J16 JD1 CPU1 FAN Slot3 PCI-E 1.0 x4 7HG 5ADG 7TN100C W8379 W8352 Slot6 PCI-E 2.0 x8 (in x16 Slot) JI2C2 SAS6 SAS5 SAS4 SAS3 SAS2 SAS1 Slot4 PCI-E 2.
2-26 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual JPW3 JPW2 JBT1 JPI2C COM1 I-SAT A0 I-Button JPS1 JWD JPL2 JPL1 JF1 SP1 1 JWOL LE1 D20 JBAT1 JP3 JL1 JPS2 JOH1 JPB JP5 J16 JD1 CPU1 FAN Slot3 PCI-E 1.0 x4 7HG 5ADG 7TN100C W8379 W8352 Slot6 PCI-E 2.
Chapter 2: Installation 2-27 JPW3 JPW2 JBT1 JPI2C COM1 I-SAT A0 I-Button JPS1 JWD JPL2 JPL1 JF1 SP1 1 JWOL LE1 D20 JBAT1 JP3 JL1 JPS2 JOH1 JPB JP5 J16 JD1 CPU1 FAN Slot3 PCI-E 1.0 x4 7HG 5ADG 7TN100C W8379 W8352 Slot6 PCI-E 2.0 x8 (in x16 Slot) JI2C2 SAS6 SAS5 SAS4 SAS3 SAS2 SAS1 Slot4 PCI-E 2.
2-28 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual W ake-On-Ring The W ake-On-Ring header is desig- nated JWOR, which will allow your system to wake up when it receives an incoming call to the modem while in the suspend state. See the table on the right for pin de fi nitions.
Chapter 2: Installation 2-29 JPW3 JPW2 JBT1 JPI2C COM1 I-SAT A0 I-Button JPS1 JWD JPL2 JPL1 JF1 SP1 1 JWOL LE1 D20 JBAT1 JP3 JL1 JPS2 JOH1 JPB JP5 J16 JD1 CPU1 FAN Slot3 PCI-E 1.0 x4 7HG 5ADG 7TN100C W8379 W8352 Slot6 PCI-E 2.0 x8 (in x16 Slot) JI2C2 SAS6 SAS5 SAS4 SAS3 SAS2 SAS1 Slot4 PCI-E 2.
2-30 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual JPW3 JPW2 JBT1 JPI2C COM1 I-SAT A0 I-Button JPS1 JWD JPL2 JPL1 JF1 SP1 1 JWOL LE1 D20 JBAT1 JP3 JL1 JPS2 JOH1 JPB JP5 J16 JD1 CPU1 FAN Slot3 PCI-E 1.0 x4 7HG 5ADG 7TN100C W8379 W8352 Slot6 PCI-E 2.
Chapter 2: Installation 2-31 JPW3 JPW2 JBT1 JPI2C COM1 I-SAT A0 I-Button JPS1 JWD JPL2 JPL1 JF1 SP1 1 JWOL LE1 D20 JBAT1 JP3 JL1 JPS2 JOH1 JPB JP5 J16 JD1 CPU1 FAN Slot3 PCI-E 1.0 x4 7HG 5ADG 7TN100C W8379 W8352 Slot6 PCI-E 2.0 x8 (in x16 Slot) JI2C2 SAS6 SAS5 SAS4 SAS3 SAS2 SAS1 Slot4 PCI-E 2.
2-32 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual JPW3 JPW2 JBT1 JPI2C COM1 I-SAT A0 I-Button JPS1 JWD JPL2 JPL1 JF1 SP1 1 JWOL LE1 D20 JBAT1 JP3 JL1 JPS2 JOH1 JPB JP5 J16 JD1 CPU1 FAN Slot3 PCI-E 1.0 x4 7HG 5ADG 7TN100C W8379 W8352 Slot6 PCI-E 2.
Chapter 2: Installation 2-33 JPW3 JPW2 JBT1 JPI2C COM1 I-SAT A0 I-Button JPS1 JWD JPL2 JPL1 JF1 SP1 1 JWOL LE1 D20 JBAT1 JP3 JL1 JPS2 JOH1 JPB JP5 J16 JD1 CPU1 FAN Slot3 PCI-E 1.0 x4 7HG 5ADG 7TN100C W8379 W8352 Slot6 PCI-E 2.0 x8 (in x16 Slot) JI2C2 SAS6 SAS5 SAS4 SAS3 SAS2 SAS1 Slot4 PCI-E 2.
2-34 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual JPW3 JPW2 JBT1 JPI2C COM1 I-SAT A0 I-Button JPS1 JWD JPL2 JPL1 JF1 SP1 1 JWOL LE1 D20 JBAT1 JP3 JL1 JPS2 JOH1 JPB JP5 J16 JD1 CPU1 FAN Slot3 PCI-E 1.0 x4 7HG 5ADG 7TN100C W8379 W8352 Slot6 PCI-E 2.
Chapter 2: Installation 2-35 JPW3 JPW2 JBT1 JPI2C COM1 I-SAT A0 I-Button JPS1 JWD JPL2 JPL1 JF1 SP1 1 JWOL LE1 D20 JBAT1 JP3 JL1 JPS2 JOH1 JPB JP5 J16 JD1 CPU1 FAN Slot3 PCI-E 1.0 x4 7HG 5ADG 7TN100C W8379 W8352 Slot6 PCI-E 2.0 x8 (in x16 Slot) JI2C2 SAS6 SAS5 SAS4 SAS3 SAS2 SAS1 Slot4 PCI-E 2.
2-36 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual JPW3 JPW2 JBT1 JPI2C COM1 I-SAT A0 I-Button JPS1 JWD JPL2 JPL1 JF1 SP1 1 JWOL LE1 D20 JBAT1 JP3 JL1 JPS2 JOH1 JPB JP5 J16 JD1 CPU1 FAN Slot3 PCI-E 1.0 x4 7HG 5ADG 7TN100C W8379 W8352 Slot6 PCI-E 2.
3-1 Chapter 3: T roubleshooting Chapter 3 T roubleshooting 3-1 T roubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘T echnical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter .
3-2 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Use the speaker to determine if any beep codes exist. Refer to the Appendix 2. for details on beep codes. Losing the System’ s Setup Con fi guration Make sure that you are using a high quality power supply .
3-3 Chapter 3: T roubleshooting users, so it is best to fi rst check with your distributor or reseller for troubleshooting services. They should know of any possible problem(s) with the speci fi c system con fi guration that was sold to you. Please go through the ‘T roubleshooting Procedures’ and 'Frequently Asked 1.
3-4 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual warning message and the information on how to update your BIOS on our web site. Select your motherboard model and download the BIOS fi le to your computer . Also, check the current BIOS revision and make sure that it is newer than your BIOS before downloading.
Chapter 4: AMI BIOS 4-1 Chapter 4 BIOS 4-1 Introduction This chapter describes the AMI BIOS Setup Utility for the X8DTL-3/X8DTL-i/X8DTL- 3F/X8DTL-iF motherboard. The AMI ROM BIOS is stored in a Flash EEPROM and can be easily updated. This chapter describes the basic navigation of the AMI BIOS Setup Utility setup screens.
4-2 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Starting the Setup Utility Normally , the only visible Power-On Self-T est (POST) routine is the memory test. As the memory is being tested, press the <Delete> key to enter the main menu of the AMI BIOS Setup Utility .
Chapter 4: AMI BIOS 4-3 Supermicro X8DTL-3/i/3F/iF V ersion • : This item displays the BIOS revision used in your system. Build Date • : This item displays the date when this BIOS was completed.
4-4 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual 4-3 Advanced Setup Con fi gurations Use the arrow keys to select Boot Setup and hit <Enter> to access the submenu items: Boot Features Quick Boot Select Enabled to skip certain tests during POST to reduce the time needed for system boot.
Chapter 4: AMI BIOS 4-5 W ait For 'F1' If Error Se lec t Ena ble d to fo rc e th e syste m to wait u nti l the u ser p re ss es th e <F 1 > key wh en an e rr or o cc ur s.
4-6 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual RTC Alarm Time (A vailable if Resume on RTC Alarm is Enabled) Set the time when the system wakes up during the day speci fi ed under RTC Alarm Date above.
Chapter 4: AMI BIOS 4-7 Adjacent Cache Line Prefetch (A vailable when supported by the CPU) The CPU prefetches the cache line for 64 bytes if this option is set to Disabled. The CPU prefetches both cache lines for 128 bytes as comprised if this item is set to Enabled .
4-8 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Intel® T urboBoost T echnology (A vailable when EIST T ech. is enabled) Select Enabled to enable T urbo Mode support to boost system performance. The options are Enabled , and Disabled. C1E Support Select Enabled to enable Enhanced Halt State support.
Chapter 4: AMI BIOS 4-9 This feature reduces or increases the frequency the system prefetches data to maximize data transfer ef fi ciency . The options are [8], [16], [32] , [40], [48], [56], [64], [.
4-10 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Memory Mode If this item is set to Independent, all DIMMs are available to the operating system. If this item is set to Channel Mirroring, the motherboard maintains two identical copies of all data in memory for redundancy .
Chapter 4: AMI BIOS 4-1 1 Intel I/OA T The Intel I/OA T (I/O Acceleration T echnology) signi fi cantly reduces CPU overhead by leveraging CPU architectural improvements, freeing resources for more tasks.
4-12 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual IDE/SA T A Con fi guration When this submenu is selected, the AMI BIOS automatically detects the presence of the IDE devices and displays.
Chapter 4: AMI BIOS 4-13 T ype Use this item to select the type of device connected to the system. The options are Not Installed, Auto , CD/DVD and ARMD. LBA/Large Mode LBA (Logical Block Addressing) is a method of addressing data on a disk drive. In the LBA mode, the maximum drive capacity is 137 GB.
4-14 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Select SWDMA0 to allow the BIOS to use Single Word DMA mode 0. It has a data transfer rate of 2.1 MB/s. Select SWDMA1 to allow the BIOS to use Single Word DMA mode 1. It has a data transfer rate of 4.
Chapter 4: AMI BIOS 4-15 Plug & Play OS Selecting Y es allows the OS to con fi gure Plug & Play devices. (This is not required for system boot if your system has an OS that supports Plug & Play .) Select No to allow the AMI BIOS to con fi gure all devices in the system.
4-16 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Super IO Device Con fi guration Serial Port1 Address/ Serial Port2 Address This option speci fi es the base I/O port address and the Interrupt Request address of Serial Port 1 and Serial Port 2.
Chapter 4: AMI BIOS 4-17 to keep C on so le Red ire ct io n act ive d ur ing P OST an d Bo ot Loa der . Th e opt io ns are D is abl ed, B oot Lo ade r , an d Alwa ys . T erminal T ype This feature allows the user to select the target terminal type for Console Redirec- tion.
4-18 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual CPU 1T emperature/CPU 2 T emperature/System T emperature This feature displays current temperature readings for CPU 1, CPU 2, and the System.
Chapter 4: AMI BIOS 4-19 it easier for the user to understand the CPU’s temperature status, rather than by just simply seeing a temperature reading (i.e., 25 o C). The information provided above is for your reference only . For more information on thermal management, please refer to Intel’s W eb site at www .
4-20 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual tion embedded in the CPU. The High Performance Event Timer is used to replace the 8254 Programmable Interval Timer. The options are Enabled and Disabled. PS2 KB/MS W akeup Select Enabled to "wakeup" the system when you press the PS2 Keyboard or Mouse.
Chapter 4: AMI BIOS 4-21 Indicate Physical Select Y es for the BIOS to show if a TPM Physical device is present. The options are No and Y es. TPM Deactivated Select Set to disable TPM support. Select Clear to enable TPM support. Select Don't Change to keep the current TPM support setting.
4-22 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual SEL Entry Number • SEL Record ID • SEL Record T ype • Event T imestamp • Generator ID • Event Message Format User • Event Sensor T ype • Event Sensor Number • Event Dir T ype • Event Data.
Chapter 4: AMI BIOS 4-23 Con fi guration Protocol) server in the network it is attached to, and request the next available IP address. The options are DHCP and Static. The following items are assigned IP addresses automatically if DHCP is selected under IP Address Source above: IP Address Enter the IP address for this machine.
4-24 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Clear event log Select "OK" to clear all messages from the Event Log. The options are OK and Cancel. PCIE Error Log Select Y es to enable PCI-E error (PERR) logging. The options are Y es and No .
Chapter 4: AMI BIOS 4-25 view the settings without making changes. Select Limited to allow the user to change selected settings such as Date and T ime. Select No Access to prevent the User from accessing the Setup Utility . Change User Password Select this feature and press <Enter> to access the submenu, and enter a new User Password.
4-26 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Boot Device Priority This feature allows the user to specify the sequence of priority for the Boot Device. The settings are 1st boot device, 2nd boot device, 3rd boot device, 4th boot device, 5th boot device and Disabled.
Chapter 4: AMI BIOS 4-27 4-6 Exit Options Select the Exit tab from the AMI BIOS Setup Utility screen to enter the Exit BIOS Setup screen. Save Changes and Exit After con fi guration the Setup settings, select this option to save the changes and exit the BIOS Setup Utility .
4-28 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Notes.
A-1 Appendix A: BIOS POST Error Codes Appendix A BIOS Error Beep Codes During the POST (Power-On Self-T est) routines, which are performed each time the system is powered on, errors may occur . Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process.
A-2 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Notes.
Appendix B: Software Installation Instructions B-1 Driver/T ool Installation Display Screen Note 1. Click the icons showing a hand writing on the paper to view the readme fi les for each item. Click on a computer icon to the right of an item to install an item (from top to the bottom) one at a time.
B-2 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Supero Doctor III Interface Display Screen-I (Health Information) B-2 Con fi guring Supero Doctor III The Supero Doctor III program is a web-based management tool that supports remote management capability .
Appendix B: Software Installation Instructions B-3 Supero Doctor III Interface Display Screen-II (Remote Control) Note : SD III S of t wa re Revi sio n 1 .0 c an be d own lo ade d fro m our We b site at : f tp:// f tp. supe r mic ro.c om /ut ilit y/ Supe ro _ D oc to r_I II/ .
B-4 X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual Notes.
(Disclaimer Continued) The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices, .
デバイスSupermicro MBD-X8DTL-I-Oの購入後に(又は購入する前であっても)重要なポイントは、説明書をよく読むことです。その単純な理由はいくつかあります:
Supermicro MBD-X8DTL-I-Oをまだ購入していないなら、この製品の基本情報を理解する良い機会です。まずは上にある説明書の最初のページをご覧ください。そこにはSupermicro MBD-X8DTL-I-Oの技術情報の概要が記載されているはずです。デバイスがあなたのニーズを満たすかどうかは、ここで確認しましょう。Supermicro MBD-X8DTL-I-Oの取扱説明書の次のページをよく読むことにより、製品の全機能やその取り扱いに関する情報を知ることができます。Supermicro MBD-X8DTL-I-Oで得られた情報は、きっとあなたの購入の決断を手助けしてくれることでしょう。
Supermicro MBD-X8DTL-I-Oを既にお持ちだが、まだ読んでいない場合は、上記の理由によりそれを行うべきです。そうすることにより機能を適切に使用しているか、又はSupermicro MBD-X8DTL-I-Oの不適切な取り扱いによりその寿命を短くする危険を犯していないかどうかを知ることができます。
ですが、ユーザガイドが果たす重要な役割の一つは、Supermicro MBD-X8DTL-I-Oに関する問題の解決を支援することです。そこにはほとんどの場合、トラブルシューティング、すなわちSupermicro MBD-X8DTL-I-Oデバイスで最もよく起こりうる故障・不良とそれらの対処法についてのアドバイスを見つけることができるはずです。たとえ問題を解決できなかった場合でも、説明書にはカスタマー・サービスセンター又は最寄りのサービスセンターへの問い合わせ先等、次の対処法についての指示があるはずです。