Texas InstrumentsメーカーTMS320C6712Dの使用説明書/サービス説明書
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SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 2 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 T able of Contents EMIF big endian mode correctness 60 .
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SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 7 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 device characteristics T able 1 provides an overview of the DSP .
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SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 12 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 memory map summary T able 2 shows the memory map address ranges of the device.
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SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 14 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 peripheral register descriptions (continued) T able 5.
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SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 16 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 peripheral register descriptions (continued) T able 10.
SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 17 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 peripheral register descriptions (continued) T able 12.
SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 18 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 signal groups description TRST EXT_INT7 ‡ IEEE Standard 1 149.
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SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 21 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 T able 14.
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SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 24 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 T erminal Functions SIGNAL PIN NO.
SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 25 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 T erminal Functions (Continued) SIGNAL PIN NO.
SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 26 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 T erminal Functions (Continued) SIGNAL PIN NO.
SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 27 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 T erminal Functions (Continued) SIGNAL PIN NO.
SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 28 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 T erminal Functions (Continued) SIGNAL PIN NO.
SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 29 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 T erminal Functions (Continued) SIGNAL PIN NO.
SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 30 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 T erminal Functions (Continued) SIGNAL PIN NO.
SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 31 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 T erminal Functions (Continued) SIGNAL PIN NO.
SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 32 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 T erminal Functions (Continued) SIGNAL PIN NO.
SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 33 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 T erminal Functions (Continued) SIGNAL PIN NO.
SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 34 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 T erminal Functions (Continued) SIGNAL PIN NO.
SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 35 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 T erminal Functions (Continued) SIGNAL PIN NO.
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SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 41 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 CPU CSR register description (continued) T able 17.
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SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 45 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 EDMA module and EDMA selector (continued) T able 23.
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SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 48 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 PLL and PLL controller (continued) T able 27.
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SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 54 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 power-down mode logic Figure 1 1 shows the power-down mode logic.
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SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 56 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 T able 32.
SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 57 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 DV DD CV DD V SS C6000 DSP Schottky Diode I/O Supply Core Supply GND Figure 13.
SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 58 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 IEEE 1 149.
SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 59 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 EMIF device speed The maximum EMIF speed on the device is 100 MHz.
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SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 63 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 P ARAMETER MEASUREMENT INFORMA TION T ransmission Line 4.
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SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 66 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 P ARAMETER MEASUREMENT INFORMA TION (CONTINUED) T able 34.
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SPRS293A − O C T OBER 2005 − REVISED NOVEMBER 2005 81 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 HOLD/HOLDA TIMING timing requirements for the HOLD /HOLDA cycles † (see Figure 37) NO.
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SPRS293 − OC T OBER 2005 86 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 MUL TICHANNEL BUFFERED SERIAL PORT TIMING timing requirements for McBSP †‡ (see Figure 41) NO.
SPRS293 − OC T OBER 2005 87 POST OFFICE BOX 144.
SPRS293 − OC T OBER 2005 88 POST OFFICE BOX 144.
SPRS293 − OC T OBER 2005 89 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 MUL TICHANNEL BUFFERED SERIAL PORT TIMING (CONTINUED) timing requirements for FSR when GSYNC = 1 (see Figure 42) NO.
SPRS293 − OC T OBER 2005 90 POST OFFICE BOX 144.
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SPRS293 − OC T OBER 2005 94 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 Bit 0 Bit(n-1) (n-2) (n-3) (n-4) Bit 0 Bit(n-1) (n-2) (n-3) (n-4) 5 4 3 7 6 2 1 CLKX FSX DX DR Figure 46.
SPRS293 − OC T OBER 2005 95 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 TIMER TIMING timing requirements for timer inputs † (see Figure 47) NO.
SPRS293 − OC T OBER 2005 96 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 GENERAL-PURPOSE INPUT/OUTPUT (GPIO) PORT TIMING timing requirements for GPIO inputs †‡ (see Figure 48) NO.
SPRS293 − OC T OBER 2005 97 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 JT AG TEST -PORT TIMING timing requirements for JT AG test port (see Figure 49) NO.
SPRS293 − OC T OBER 2005 98 POST OFFICE BOX 144.
PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) TMS320C6712DGDP150 ACTIVE BGA GDP 272 40 TBD SNPB Level-.
MECHANICAL DA T A MPBG274 – MA Y 2002 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 GDP (S–PBGA–N272) PLASTIC BALL GRID ARRA Y 2468 2 0 18 16 14 12 10 M E A 1 C B D G F H K J L W R N P U T V Y .
MECHANICAL DA T A MPBG276 – MA Y 2002 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ZDP (S–PBGA–N272) PLASTIC BALL GRID ARRA Y 2468 2 0 18 16 14 12 10 M E A 1 C B D G F H K J L W R N P U T V .
IMPORT ANT NOTICE T exas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.
デバイスTexas Instruments TMS320C6712Dの購入後に(又は購入する前であっても)重要なポイントは、説明書をよく読むことです。その単純な理由はいくつかあります:
Texas Instruments TMS320C6712Dをまだ購入していないなら、この製品の基本情報を理解する良い機会です。まずは上にある説明書の最初のページをご覧ください。そこにはTexas Instruments TMS320C6712Dの技術情報の概要が記載されているはずです。デバイスがあなたのニーズを満たすかどうかは、ここで確認しましょう。Texas Instruments TMS320C6712Dの取扱説明書の次のページをよく読むことにより、製品の全機能やその取り扱いに関する情報を知ることができます。Texas Instruments TMS320C6712Dで得られた情報は、きっとあなたの購入の決断を手助けしてくれることでしょう。
Texas Instruments TMS320C6712Dを既にお持ちだが、まだ読んでいない場合は、上記の理由によりそれを行うべきです。そうすることにより機能を適切に使用しているか、又はTexas Instruments TMS320C6712Dの不適切な取り扱いによりその寿命を短くする危険を犯していないかどうかを知ることができます。
ですが、ユーザガイドが果たす重要な役割の一つは、Texas Instruments TMS320C6712Dに関する問題の解決を支援することです。そこにはほとんどの場合、トラブルシューティング、すなわちTexas Instruments TMS320C6712Dデバイスで最もよく起こりうる故障・不良とそれらの対処法についてのアドバイスを見つけることができるはずです。たとえ問題を解決できなかった場合でも、説明書にはカスタマー・サービスセンター又は最寄りのサービスセンターへの問い合わせ先等、次の対処法についての指示があるはずです。