Acerメーカー61Xの使用説明書/サービス説明書
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TI Extensa 61X Series ( AcerNote 370P) Notebook Service Guide PART NO.: 2238309-0809 DOC. NO.: PRINTED IN USA.
ii Copyright Copyright © 1997 by Acer Incorporated. All rights reserved. No part of this publication may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any .
iii About this Manual Purpose This service guide contains reference information for the Extensa 610 notebook computer. It gives the system and peripheral specifications, shows how to identify and solve system problems and explains the procedure for removing and replacing system components.
iv Appendix E BIOS POST Checkpoints This appendix lists all the BIOS POST checkpoints. Appendix F Technical Bulletins and Updates This appendix reserves a space for technical bulletins and future updates. Appendix G Forms This appendix contains standard forms that can help improve customer service.
v Conventions The following are the conventions used in this manual: Text entered by user Represents text input by the user. Screen messages Denotes actual messages that appear onscreen. NOTE Gives bits and pieces of additional information related to the current topic.
vi.
vii Table of Contents Chapter 1 System Introduction 1.1 Overview .......................................................................................................................... 1-1 1.1.1 Features ............................................
viii 1.4.17 Keyboard ........................................................................................................ 1-23 1.4.17.1 Windows 95 Keys ........................................................................ 1-23 1.4.18 FDD ......
ix 2.4 ALI M7101 (Power Management Unit) .......................................................................... 2-24 2.4.1 Features ......................................................................................................... 2-24 2.4.
x 2.9.5 Pin Diagram ................................................................................................... 2-94 2.9.6 Pin Description ............................................................................................... 2-95 2.9.
xi 3.4 System Security ................................................................................................................ 3-6 3.4.1 Floppy Disk Drive Control ...............................................................................
xii 4.5 Disassembling the Inside Frame Assembly ..................................................................... 4-10 4.5.1 Removing the Heat Sink Assembly ................................................................. 4-10 4.5.2 Removing the Internal Drive .
xiii List of Figures 1-1 Notebook .......................................................................................................................... 1-1 1-2 Rear Po rts ..........................................................................
xiv 2-14 PCI-to-CardBus terminal assignments ............................................................................ 2-62 2-15 NS87336VJG Block Diagram ......................................................................................... 2-77 2-16 NS87336VJG Pin Diagram .
xv 4-20 Removing the Battery Connector Board .......................................................................... 4-18 4-21 Unplugging the LCD Cover Switch and Speaker Cables ................................................. 4-18 4-22 Removing the Charger Board .
xvi List of Tables 1-1 Port Descriptions ............................................................................................................. 1-3 1-2 Indicator Status Descriptions ..............................................................
xvii 1-28 CD-ROM S pecifications ................................................................................................. 1-25 1-29 Battery Specifications .......................................................................................
xviii 2-14 NS87336VJG Pin Descriptions ....................................................................................... 2-79 2-15 YMF715 Descriptions ..............................................................................................
C h a p t e r 1 C h a p t e r 1 System Introduction System Introduction 1- 1 This chapter introduces the notebook, its features, components and specifications. 1.1 Overview The notebook was designed with the user in mind. The figure below shows the notebook with the display open.
1- 2 Service Guide 1.1.1 Features Here are just a few of the notebook’s many features: Performance • High-end Pentium microprocessor • Support 64-bit main memory and external (L2) cache memory • Large LCD display (DualScan STN and TFT active matrix.
System Introduction 1- 3 1.1.2 Rear Ports 1 DC-in Port 6 Serial Port 2 Microphone-in Port 7 Parallel Port 3 Lin e-in Port 8 External CRT Port 4 Line-out Port 9 PS/2 Port 5 External Floppy Drive Connector Figure 1-2 Rear Ports The following table describes these ports.
1- 4 Service Guide Figure 1-3 Indicator Light This two-way indicator light allows you to see the notebook status when the display is open or closed. The indicator serves both as a power and battery-charging indicator.
System Introduction 1- 5 1.1.4 System Specifications Overview Table 1-3 System Specifications Item Standard Optional Microprocessor Intel Pentium™ processor (Intel P54CSLM 120/133/150 MHz) Intel P55.
1- 6 Service Guide Table 1-3 System Specifications (continued) Item Standard Optional I/O ports (continued) One 3.5mm minijack mic-in port One 3.5mm minijack line-in port One 3.5mm minijack line-out port Microphone Audio CD player or other line-in devices Speakers or headphones Operating system Windows 95 Windows 3.
System Introduction 1- 7 1.2 System Board Layout 1.2.1 Main Board (PCB No: 96149-SC) Figure 1-4 Main Board Layout (Top Side) Note: This switch setting is not for Extensa 610 use.
1- 8 Service Guide Figure 1-5 Main Board Layout (Bottom Side).
System Introduction 1- 9 1.2.2 Audio Connection Board (PCB No:96467-1) Figure 1-6 Audio Connection Board Layout (Top Side) 1.2.3 Battery Connection Board (PCB No:95498-1) Figure 1-7 Battery Connection.
1- 10 Service Guide 1.2.4 HDD Connection Board (PCB No:96463-1) Figure 1-9 HDD Connection Board Layout (Top Side) Figure 1-10 HDD Connection Board Layout (Bottom Side).
System Introduction 1- 11 1.2.5 Keyboard Connection Board (PCB No: 96465-1) Figure 1-11 Keyboard Connection Board Layout (Top Side) Figure 1-12 Keyboard Connection Board Layout (Bottom Side).
1- 12 Service Guide 1.3 Jumpers and Connectors CN1 CN6 CN2 CN7 CN3 CN8 CN9 CN4 CN10 CN5 CN11 CN12 CN14 CN17 CN18 CN19 SW2 SW3 CN13 CN15 CN16 S1 CN1 External PS/2 keyboard/mouse port CN12 Audio Board C.
System Introduction 1- 13 Table 1-4 CPU Voltage (S1) Settings CPU Voltage 2.35V 2.45V 2.9V 3.1V Switch 1 Off Off Off Off Switch 2 Off On Off Off Switch 3 On Off Off Off Switch 4 Off Off Off On Table 1.
1- 14 Service Guide 1.4 Hardware Configuration and Specification 1.4.1 Memory Address Map Table 1-7 Memory Address Map Address Range Definition Function 000000 - 09FFFF 640 KB memory Base memory 0A000.
System Introduction 1- 15 1 1 1 2 2 2 2 1 2 3 4 5 6 7 0083 0081 0082 Cascade 008B 0089 008A Audio Diskette Audio (option)/ECP(option) Cascade - Spare - 1.
1- 16 Service Guide 1.4.5 M7101 GPIO (General Purpose I/O) Port Definition Table 1-11 M7101 GPIO Port Definition Item Description GPIOA2 Smart inverter contrast counter control GPIOA3 0: Normal operat.
System Introduction 1- 17 Item Specification BIOS vendor Acer BIOS version v2.1 BIOS in flash EPROM (Y/N) Yes BIOS ROM size 256KB BIOS package type 32-pin TSOP Same BIOS for STN color/TFT color (Y/N) Yes The BIOS can be overwritten/upgradeable using the “AFLASH” utility (AFLASH.
1- 18 Service Guide The following table lists all possible memory configurations. Table 1-14 Memory Configurations Slot 1 Slot 2 Total Memory 8 MB 0 MB 8 MB 0 MB 8 MB 8 MB 8 MB 8 MB 16 MB 16 MB 0 MB 1.
System Introduction 1- 19 1.4.10 Video Memory Table 1-15 Video RAM Configuration Item Specification DRAM or VRAM DRAM(EDO type) Fixed or upgradeable Fixed Memory size/configuration 1MB (256K x 16 x 2pcs) Memory speed 60ns Memory voltage 3.3V Memory package TSOP 1.
1- 20 Service Guide 1280x1024x16 86I 60 Y Y 1.4.11.2 LCD Resolution Support Table 1-18 Supported LCD Resolutions Resolution x Color on LCD Only TFT LCD (SVGA) STN LCD (SVGA) 640x480x16 Y Y 640x480x256.
System Introduction 1- 21 1.4.12 Parallel Port Table 1-19 Parallel Port Configurations Item Specification Number of parallel ports 1 ECP/EPP support Yes (set by BIOS setup) Connector type 25-pin D-typ.
1- 22 Service Guide 1.4.14 Audio Table 1-21 Audio Specifications Item Specification Chipset YMF715 Audio onboard or optional Built-in Mono or stereo Stereo Resolution 16-bit Compatibility SB-16 , Windows Sound System Mixed sound sources Voice, Synthesizer, Line-in, Microphone, CD Voice channel 8-/16-bit, mono/stereo Sampling rate 44.
System Introduction 1- 23 1.4.16 Touchpad Table 1-23 Touchpad Specifications Item Specification Vendor & model name Synaptics TM1002MPU Power supply voltage (V) 5 ± 10% Location Palm-rest center .
1- 24 Service Guide 1.4.18 FDD Table 1-26 FDD Specifications Item Specification Vendor & model name Mitsumi D353F2 Floppy Disk Specifications Media recognition 2DD (720K) 2HD (1.
System Introduction 1- 25 Item Specification Performance Specifications Data transfer rate (host-buffer, Mbytes/s) 16.6 (max., PIO mode 4) 16.6 (max., PIO mode 4) 16.6 (max., PIO mode 4) 16.6 (max., PIO mode 4) DC Power Requirements Voltage tolerance (V) 5 ± 5% 5 + 5%, -10% 5 ± 5% 5 ± 5% 1.
1- 26 Service Guide 1.4.22 Charger To charge the battery, place the battery pack inside the battery compartment and plug the AC adapter into the notebook and an electrical outlet. The adapter has three charging modes: • Rapid mode The notebook uses rapid charging when power is turned off and a powered AC adapter is connected to it.
System Introduction 1- 27 Item Specification Vendor & model name Ambit T62.061.C.00 Input voltage ( Vdc) 8~21 Output Rating 5V 3.3V 2.9V (2.35/2.45/2.9/3.1V) +12V +6V 5VSB Current (w/ load, A) 0~3.2 0~3.3 0~3.0 0~0.15 0~0.1 0.005 Voltage ripple (max.
1- 28 Service Guide 1.4.25 LCD Table 1-33 LCD Specifications Item Specification Vendor & model name HITACHI LMG9900ZWCC TORiSAN LM-FH53-22NAW IBM ITSV45E GOLDSTAR LP121S1-J Mechanical Specifications LCD display area (diagonal, inch) 11.3 11.3 11.3 12.
System Introduction 1- 29 1.4.26 AC Adapter Table 1-34 AC Adapter Specifications Item Specification Vendor & model name Delta ADP-45GB REV.E2 Input Requirements Nominal voltages (Vrms) 90 - 264 Frequency variation range (Hz) 47 - 63 Maximum input current (A, @90Vac, full load) 1.
1- 30 Service Guide 1.5 Software Configuration and Spe cification 1.5.1 BIOS The BIOS is compliant to PCI v2.1, APM v1.2, E-IDE and PnP specification. It also defines the hotkey functions and controls the system power-saving flow. 1.5.1.1 Keyboard Hotkey Definition The notebook supports the following hotkeys.
System Introduction 1- 31 1.5.1.3 Power Management Figure 1-14 Power Management Block Diagram.
1- 32 Service Guide ON MODE Normal full-on operation STANDBY MODE The notebook consumes very low power in standby mode. Data remain intact in the system memory until battery is drained.
System Introduction 1- 33 A necessary condition for the notebook to enter hibernation mode is that the reserved space for saving system information on the hard disk must be larger than the combined system and video memory size. Under such conditions, the standby/hibernation hotkey acts as the hibernation hotkey.
1- 34 Service Guide Table 1-37 Hibernation Mode Conditions and Descriptions Condition Description The condition to enter Hibernation Mode • “Hard Disk Drive” is not [Disabled] in System Security of BIOS SETUP. • “Hard Disk 0” is not [None] in Basic System Configuration of BIOS SETUP.
System Introduction 1- 35 Table 1-39 Hard Disk Standby Mode Conditions and Descriptions Condition Description The condition to enter HDD Standby Mode • Display Standby Timer times-out or LCD cover is closed.
1- 36 Service Guide 1.5.2 Drivers, Applications and Utilities The notebook comes preloaded with the following software: • Windows 95 2 • System utilities and application software 3 • Sleeper man.
System Introduction 1- 37 1.6 System Block Diagram Figure 1-15 System Block Diagram.
1- 38 Service Guide 1.7 Environmental Requirements Table 1-42 Environmental Requirements Item Specification Temperature Operating (ºC) +5 ° C ~ +35 ° C Non-operating( ºC) -20 ° C ~ +60 ° C Humidity Operating (non-condensing) 20% ~ 80% Non-operating (non-condensing) 20% ~ 80% Operating Vibration (unpacked) Operating 5 - 25.
System Introduction 1- 39 1.8 Mechanical Specifications Table 1-43 Mechanical Specifications Item Specification Weight FDD model CD-ROM model (includes battery) 2.6 kg. (5.7 lb.) 2.8 kg. (6.2 lb.) Dimensions (main footprint) W x D x H 306mm x 228mm x 46mm (12.
C h a p t e r 2 C h a p t e r 2 Major Chips Description Major Chips Description 2- 1 This chapter discusses the major chips used in the notebook. 2.1 Major Component List Table 2-1 Major Chips List Co.
2- 2 Service Guide 2.2 ALI M1521 The ALADDIN-III consists of two chips, ALI M1521 and M1523 to give a 586 class system the complete solution with the most up-to-date feature and architecture for the new multimedia/multithreading operating system.
Major Chips Description 2- 3 • UMA (unified memory architecture) • Dedicated UMA arbiter pins • Supports several protocols from major graphics vendors • SFB size : 512KB/1MB/2MB/3MB/4MB • CP.
2- 4 Service Guide 2.2.2 Block Diagram 586 CPU SRAM M1521 BGA DRAM HDD M1523 UMA Graphic controller IDE Master Aladdin III System Block Diagram CD CPU Bus PCI Bus ISA Bus USB connector Figure 2-1 Alla.
Major Chips Description 2- 5 2.2.3 System Architecture M1521 M1523 ALADDIN-III SYSTEM ARCHITECTURE tag 8/11-bit TTL SRAM 208-PQFP/RTC/KBC 328-BGA 586 CPU addr data PCI ISA DRAM MD GC MA CTLR IDE bus H.
2- 6 Service Guide 2.2.4 Data Path E C C 64-bit SWAP HD_ OUT 64-bit SWAP 6 DWORD 5 DWORD 6 DWORD MUX PCI_OUT PCI_IN P_IN[31:0] PB_OUT[63:0] 64-bit HDIN[63:0] MUX 72-bit ECC 72-bit SWAP 8 QWORD MUX MUX.
Major Chips Description 2- 7 2.2.5 Pin Diagram Figure 2-4 M1521 Pin Diagram.
2- 8 Service Guide 2.2.6 Signal Descriptions Table 2-2 M1521 Signal Descriptions Signal Pin Type Description Host Interface A[31:29] A[28:26] A[25:23] A[22:20] A[19:17] A[16:14] A[13:11] A[10:08] A[07.
Major Chips Description 2- 9 Table 2-2 M1521 Signal Descriptions (continued) Signal Pin Type Description Host Interface M/IOJ H5 I Host Memory or I/O. This bus definition pin indicates the current bus cycle is either memory or input/ output. D/CJ T7 I Host Data or Code.
2- 10 Service Guide Table 2-2 M1521 Signal Descriptions (continued) Signal Pin Type Description DRAM Interface RASJ[6] / SCASJ[0] M16 O Row Address Strobe 6, or Synchronous DRAM CAS 0 (FPM/EDO/BEDO) of DRAM bank 6. SDRAM column address strobe (SDRAM) copy 0.
Major Chips Description 2- 11 Table 2-2 M1521 Signal Descriptions (continued) Signal Pin Type Description Secondary Cache Interface CCSJ/CB4 W16 O Synchronous SRAM chip select or Cache Address line 4 copy. This pin has two modes of operation depending on the type of SRAM selected via hardware strapping options or programming the CC register.
2- 12 Service Guide Table 2-2 M1521 Signal Descriptions (continued) Signal Pin Type Description TRDYJ E8 I/O Target Ready. This indicates the target is ready to complete the current data phase of transaction. STOPJ E11 I/O Stop. This indicates the target is requesting the master to stop the current transaction.
Major Chips Description 2- 13 Table 2-2 M1521 Signal Descriptions (continued) Signal Pin Type Description UMA Interface MGNTJ/ GNTJ[4] F7 O Memory Grant. This output connects to the MGNTJ of the GUI device. This pin can also be used as grant signal of the fifth PCI master.
2- 14 Service Guide 2.3 ALI M1523 The M1523 is a bridge between PCI and ISA bus, providing full PCI and ISA compatible functions. The M1523 has Integrated System Peripherals (ISP) on-chip and provides advanced features in the DMA controller. This chip contains the keyboard controller, real-time clock and IDE master controller.
Major Chips Description 2- 15 • 32-bit addressability • Provides compatible DMA transfers • Provides type F transfers • Interrupt controller • Provides 14 interrupt channels • Independentl.
2- 16 Service Guide 2.3.2 Block Diagram M1523 Bl oc k Diagram DATA Buffer Control Address Buffer Decoder Clock & Reset PCI BUS Interface UNIT PCI Arbiter Interface ISA Interrupt UNIT PCI Interrupt.
Major Chips Description 2- 17 2.3.3 Pin Diagram VDD IRQ12 MSCLK KBDATA KBCLK/KBCSJ KBINH/IRQ1 IDESCS3J IDESCS1J IDEPCS3J IDEPCS1J IDE_A0 IDE_A2 IDE_A1 IDAKJ1 IDAKJ0 IDERDY IDEIORJ IDEIO WJ IDRQ1 IDRQ0.
2- 18 Service Guide 2.3.4 Signal Descriptions Table 2-3 M1523 Signal Descriptions Signal Pin Type Description Clock and Reset PWG 17 I Power-Good Input. This signal comes from the power supply to indicate that power is available and stable. CPURST 49 O CPU Reset includes cold and warm reset 3.
Major Chips Description 2- 19 Table 2-3 M1523 Signal Descriptions (continued) Signal Pin Type Description PCI Interrupt Unit INTAJ_MI 67 I PCI Interrupt Input A or PCI interrupt polling input. INTBJ 68 I/O PCI Interrupt Input B or polling select_0 output.
2- 20 Service Guide Table 2-3 M1523 Signal Descriptions (continued) Signal Pin Type Description ISA Interface SA[16:0] 181, 185, 187, 188, 190, 192, 193, 195, 197, 199, 201, 203, 205, 207, 3, 4, 5 I/O ISA Slot Address Bus. These lines are addresses connected to slot address.
Major Chips Description 2- 21 Table 2-3 M1523 Signal Descriptions (continued) Signal Pin Type Description ISA Interface SMEMRJ / LMEGJ 176 O ISA System Memory Read. When the internal RTC is enabled, this signal indicates that the memory read cycle is for an address below 1 -MB address.
2- 22 Service Guide Table 2-3 M1523 Signal Descriptions (continued) Signal Pin Type Description Miscellaneous MSCLK 154 O Mouse Clock Output when the internal KBC is enabled. RTC32KI 16 I RTC 32.768K Osc1. This is crystal input and requires an external 32.
Major Chips Description 2- 23 Table 2-3 M1523 Signal Descriptions (continued) Signal Pin Type Description IDE Interface IDE_D[15:0] 135, 132, 130, 128, 126, 124, 122, 119, 121, 123, 125, 127, 129, 131, 133, 136 I/O IDE ATA Data Bus Vcc and Vss VCC3 53 P Vcc 3.
2- 24 Service Guide 2.4 ALI M7101 (Power Management Unit) 2.4.1 Features • Four operating states - ON, DOZE, SLEEP, APM • Programmable DOZE and SLEEP timer • Programmable EL timer for backlight .
Major Chips Description 2- 25 2.4.2 Pin Diagram Vss AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 CBEJ2 VDD5 FRAMEJ IRDYJ TRDYJ DEVSELJ PAR CBEJ1 SMIJ Vss AD15 AD14 AD13 AD12 AD11 AD10 1 2 3 4 5 6 7 8 9 10 .
2- 26 Service Guide 2.4.3 Pin Description Table 2-4 M7101 Pin Descri ptions Name No. Type Description PCI interface : (42) PCICLK 89 I PCI Clock. This is the PCI Bus interface CLK input signal. This clock frequency should not be more than 33 Mhz. It is used by internal PCI interface.
Major Chips Description 2- 27 Table 2-4 M7101 Pin Descriptions (Continued) Name No. Type Description PMU Input event interface : (11) LBJ 47 I Low Battery.
2- 28 Service Guide Table 2-4 M7101 Pin Descriptions (Continued) Name No. Type Description PMU Input event interface : (11) PS2 50 I External PS2 MOUSE. This signal represents whether the PS2 MOUSE is plugged in or not. When a PS2 MOUSE is plugged in, a high to low transition will generate a SMIJ.
Major Chips Description 2- 29 Table 2-4 M7101 Pin Descriptions (Continued) Name No. Type Description PMU output interface (9) CCFT 57 O Backlight control. This signal is used to turn on/off LCD backlight. FPVEE will AND with offset 0D2h D0 to generate CCFT.
2- 30 Service Guide Table 2-4 M7101 Pin Descriptions (Continued) Name No. Type Description General purpose I/O interface(24) General purpose I/O group A GPIOA6 /SPEKIN (70) I Speak input. When offset 0F6h D6=‘1’, this pin will be speaker input. The input signal will xor with SPKCTL internally.
Major Chips Description 2- 31 Table 2-4 M7101 Pin Descriptions (Continued) Name No. Type Description General purpose I/O interface(24) General purpose I/O group A GPIOA0 /GPIORAJ (64) O External General Purpose I/O A read. When SPKCTL is pull low 4.7K, the GPIOA0 will become GPIORAJ.
2- 32 Service Guide Table 2-4 M7101 Pin Descriptions (Continued) Name No. Type Description General purpose I/O interface(24) General purpose I/O group B GPIOB3 /IN_BRDYJ (84) I BRDYJ Input. When DISPLAY is pulled low, this pin will be BRDYJ input. It must be connected to CPU.
Major Chips Description 2- 33 Table 2-4 M7101 Pin Descriptions (Continued) Name No. Type Description General purpose I/O interface(24) General purpose I/O group C GPIOC5 /EXTSW (78) External suspend/resume switch. When offset 0F6h D10=0, this signal is GPIOC5.
2- 34 Service Guide Table 2-4 M7101 Pin Descriptions (Continued) Name No. Type Description Power Pins VDD5 x 3 11,59,76 P 5V VDD input VDD3 x 2 26,100 P 3.3V VDD input VDDS x 1 46 P 5V Suspend VDD input. This pin supplies to RI, RTC, HOTKEYJ, COVSW, SUSTATE, PWGD, SUSRSTJ pad.
Major Chips Description 2- 35 When offset 0F6h, D5=1 and offset 0FBh, D7=1; GPIOB[7:0] and GPIOA[7:0] output some clocks for testing. The clocks are OTCOUNT, O16K, TCLK2, TCLK3, O128HZ, O16HZ, O8HZ, O4HZ, O2HZ, O1Hz, ELCOUNT, DZCOUNT, SLCOUNT, RICOUNT, LBCOUNT[1:0].
2- 36 Service Guide 2.4.5 Numerical Pin List Table 2-7 M7101 Numerical Pin List No. Pin Name Type No. Pin Name Type 1 VSS P 51 CRT I 2 AD23 I/O 52 DRQ I 3 AD22 I/O 53 SLED O 4 AD21 I/O 54 SQWO O 5 AD2.
Major Chips Description 2- 37 2.4.6 Alphabetical Pin List Table 2-8 M7101 Alphabetical Pin List No. Pin Name Type No. Pin Name Type 49 ACPWR I 68 GPIOA4 I/O 37 AD0 I/O 69 GPIOA5 I/O 36 AD1 I/O 70 GPIO.
2- 38 Service Guide 2.4.7 Function Description The function blocks of M7101 are as follows : 1. PCI Interface 2. State Controller 3. Timer 4. Wake up event handler 5. Activity monitor 6. Battery monitor 7. General Purpose Input/Output (GPIO) 8. SMIJ Generator 9.
Major Chips Description 2- 39 Table 2-9 M7101 PCI Interface Lock Register Action I/O Port 0178h/0078h I/O Port 017Ah/007Ah Lock Read not available except offset 0D1h not available except offset 0D1h L.
2- 40 Service Guide 2.5 C&T 65550 High Performance Flat Panel/CRT VGA Controller The C&T65550 of high performance multimedia flat panel / CRT GUI accelerators extend CHIPS’ offering of high performance flat panel controllers for full-featured note books and sub-notebooks.
Major Chips Description 2- 41 The C&T65550 offers a variety of programmable features to optimize display quality. Vertical centering and stretching are provided for handling modes with less than 480 lines on 480-line panels.
2- 42 Service Guide 2.5.3 Pin Diagram Figure 2-10 C&T 65550 Pin Diagram.
Major Chips Description 2- 43 2.5.4 Pin Descriptions Table 2-10 C&T 65550 Pin Descriptions Pin# Pin Name Type Description CPU Direct / VL-Bus Interface 207 RESET In Reset.
2- 44 Service Guide Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description CPU Direct / VL-Bus Interface (continued) 43 BE0# (BLE#) In Byte Enable 0. Indicates data transfer on D7:D0 for the current cycle. 32 BE1# In Byte Enable 1.
Major Chips Description 2- 45 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description CPU Direct / VL-Bus Interface (continued) 51 50 49 48 47 46 45 44 41 40 38 37 36 35 3.
2- 46 Service Guide Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description PCI Bus Interface (continued) 31 PAR I/O Parity. This signal is used to maintain even parity across AD0-31 and C/BE0-3#. PAR is stable and valid one clock after the address phase.
Major Chips Description 2- 47 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description PCI Bus Interface (continued) 30 SERR# (MCLKOUT) OD System Error. Used to report system errors where the result will be catastrophic (address parity error, data parity errors for Special Cycle commands, etc.
2- 48 Service Guide Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description PCI Bus Interface (continued) 51 50 49 48 47 46 45 44 41 40 38 37 36 35 34 33 20 19 18 17 16 15.
Major Chips Description 2- 49 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description PCI Bus Interface (continued) 43 32 21 10 C/BE0# C/BE1# C/BE2# C/BE3# In In In In Bus Command / Byte Enables.
2- 50 Service Guide Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description PCI Bus Interface (continued) 90 91 92 93 94 95 96 97 98 CA0 (P16) CA1 (P17) CA2 (P18) CA3 (P19) CA4 (P10) CA5 (P21) CA6 (P22) CA7 (P23) CA8 (BLANK) Out Out Out Out Out Out Out Out I/O Address bus for DRAM C.
Major Chips Description 2- 51 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description Display Memory Interface 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 .
2- 52 Service Guide Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description Flat Panel Display Interface 71 72 73 74 75 76 78 79 81 82 83 84 85 86 87 88 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 Out Out Out Out Out Out Out Out Out Out Out Out Out Out Out Out 8, 9, 12, or 16-bit flat panel data output.
Major Chips Description 2- 53 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description Flat Panel Display Interface (continued) 55 RSET In Set point resistor for the internal color palette DAC. A 560 Ω 1% resistor is required between RSET and AGND.
2- 54 Service Guide Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description Power / Ground and Standby Control (continued) 66 63 89 DCC DGND DGND VCC GND GND Power / Ground (Bus Interface) 5V ± 10% or 3.
Major Chips Description 2- 55 BUS OUTPUT SIGNAL STATUS DURING STANDBY MODE Table 2-12 Bus Output Signal Status During Standby Mode 65550 Pin# Signal Name Signal Status 53 ACTI / A26 Driven Low 54 EBAB.
2- 56 Service Guide 2.6 TI PCI1131 CardBus Controller 2.6.1 Overview The PCI1131 is a bridge between the PCI local bus and two PC Card sockets supporting both 16- bit and 32-bit CardBus PC Cards, and is compliant with the PCI Local Bus Specification Revision 2.
Major Chips Description 2- 57 2.6.2 Architecture The Texas Instruments PCI1131 is a high-performance PCI-to-PC Card controller that supports two independent PC Card sockets compliant with the1995 PC Card Standard.
2- 58 Service Guide • Packaged in a 208-pin TQFP • Multi-function PCI Device with Separate Configuration Spaces for each Socket • Five PCI Memory Windows and Two l/O Windows Available to each PC.
Major Chips Description 2- 59 2.6.4 Block Diagram Figure 2-11 Functional Block Diagram - 16-bit PC Card Interface.
2- 60 Service Guide Figure 2-12 Functional block diagram - CardBus Card Interface.
Major Chips Description 2- 61 2.6.5 Pin Diagram Figure 2-13 PCI-to-PC Card (16-bit) terminal assignments.
2- 62 Service Guide Figure 2-14 PCI-to- CardBus terminal assignments.
Major Chips Description 2- 63 2.6.6 Terminal Functions Table 2-13 PCI1131 Pin Descriptions TERMINAL NAME NO. I/O TYPE FUNCTION PCI System Terminals PCLK 165 I PCI Bus clock. The PCI bus clock provides timing for all transactions on the PCI bus. All PCI signals are sampled at the rising edge of PCLK.
2- 64 Service Guide Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL NAME NO. I/O TYPE FUNCTION PCI Address and Data Terminals C/BE3 180 C/BE2 192 C/BE1 203 C/BE0 5 I/O 8us commands and byte enables. These are muitiplexed on the same PCI terminals.
Major Chips Description 2- 65 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL NAME NO. I/O TYPE FUNCTION PCI Interface Control Terminals TRDY 196 I/O Target ready. Indicates the PCI 1131 ability to complete the current data phase of the transaction.
2- 66 Service Guide Table 2-13 PCI113 1 Pin Descriptions (Continued) TERMINAL Name Slot Slot I/O TYPE FUNCTION A+ B ≠ ≠ 1 6-bit PC Card Address and Data (Slots A and B) D15 93 27 D14 91 25 D13 89 23 D12 87 20 D11 84 18 D10 147 81 D9 145 79 D8 142 77 D6 90 24 D5 88 21 D4 85 19 D3 83 17 D2 146 80 D1 144 78 D0 141 76 I/O PC Card Data.
Major Chips Description 2- 67 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL Name Slot Slot I/O TYPE FUNCTION A+ B ≠ ≠ 1 6-bit PC Card Interface Control Signals (Slots A and B) BVD2 137 71 (SPKR) I Battery Voltage Detect 2. Generated by 16-bit memory PC Cards that include batteries.
2- 68 Service Guide Table 2-13 PCI11 31 Pin Descriptions (Continued) TERMINAL Name Slot Slot I/O TYPE FUNCTION A+ B ≠ ≠ 1 6-bit PC Card Address and Data (Slots A and B) IORD 99 33 O I/O Read. LORD is asserted by the PCI1131 to enable 16-bit l/O PC Card data output during host I/O read cycles.
Major Chips Description 2- 69 Table 2-13 PCI1131 Pin Descriptions ( Continued) TERMINAL Name Slot Slot I/O TYPE FUNCTION A+ B ≠ ≠ 1 6-bit PC Card Interface Control Signals (Slots A and B) WP 139 73 (IOIS16) I Write Protect. This signal applies to 16-bit Memory PC Cards.
2- 70 Service Guide Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL Name Slot Slot I/O TYPE FUNCTION A+ B ≠ ≠ CardBus PC Card Address and Data Signals (Slots A and B) CC/BE0 94 28 CC/BE1 104 39 CC/BE2 117 52 CC/BE3 130 63 I/O CardBus PC Card Command and Byte Enables.
Major Chips Description 2- 71 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL Name Slot Slot I/O TYPE FUNCTION A+ B ≠ ≠ CardBus PC Card Interface Control Signals (Slots A and B) CBLOCK 107 42 I/O CardBus Lock. This is an optional signal used to lock a particular address, ensuring a bus initiator exclusive access.
2- 72 Service Guide Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL Name Slot Slot I/O TYPE FUNCTION A+ B ≠ ≠ CardBus PC Card Interface Control Signals (Slots A and B) CREQ 127 61 I CardBus Request. This signal ir1dicates to the arbiter that the CardBus PC Card desires use the CardBus bus.
Major Chips Description 2- 73 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL NAME NO I /O TYPE FUNCTION Interrupt Terminals IRQ3/INTA 154 IRQ4/INTB 155 O Interrupt Request 3 and Interrupt Request 4. These terminals may be connected to either PCI or ISA interrupts.
2- 74 Service Guide Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL NAME NO I /O TYPE FUNCTION Interrupt Terminals IRQ15/ RI_OUT 163 I/O Interrupt Request 15.
Major Chips Description 2- 75 2.7 NS87336VJG Super I/O Controller The PC87336VJG is a single chip solution for most commonly used I/O peripherals in ISA, and EISA based computers.
2- 76 Service Guide • The Bidirectional Parallel Port: • Enhanced Parallel Port(EPP) compatible • Extended Capabilities Port(ECP) compatible, including level 2 support • Bidirectional under ei.
Major Chips Description 2- 77 • Plug and Play Compatible: • 16 bit addressing(full programmable) • 10 selectable IRQs • 3 selectable DMA Channels • 3 SIRQ Inputs allows external devices to mapping IRQs • 100-Pin TQFP package - PC87336VJG 2.
2- 78 Service Guide 2.7.3 Pin Diagram Figure 2-16 NS87336VJG Pin Diagram.
Major Chips Description 2- 79 2.7.4 Pin Description Table 2-14 NS87336VJG Pin Descriptions Pin No. I/O Description A15-A0 67, 64, 62-60, 29, 19- 28 I Address. These address lines from the microprocessor determine which internal register is accessed. A0-A15 are don't cares during DMA transfer.
2- 80 Service Guide Table 2-14 NS87336VJG Pin Descriptions (continued) Pin No. I/O Description /CS0, /CS1 51, 3 O Programmable Chip Select. /CS0, 1 are programmable chip select and/or latch enable and/or output enable signals that can be used as game port, I/O expand, etc.
Major Chips Description 2- 81 Table 2-14 NS87336VJG Pin Descriptions (continued) Pin No. I/O Description DENSEL (Normal Mode) 46 O FDC Density Select. DENSEL indicates that a high FDC density data rate (500 Kbs, 1 Mbs or 2 Mbs) or a low density data rate (250 or 300 Kbs) is selected.
2- 82 Service Guide Table 2-14 NS87336VJG Pin Descriptions (continued) Pin No. I/O Description /DRV2 47 I FDD Drive2. This input indicates whether a second disk drive has been installed. The state of this pin is available from Status Register A in PS/2 mode.
Major Chips Description 2- 83 Table 2-14 NS87336VJG Pin Descriptions (continued) Pin No. I/O Description IORCHDY 51 O I/O Channel Ready. When IORCHDY is driven low, the EPP extends the host cycle. IRQ3, 4 IRQ5-7 IRQ9-11 IRQ12, 15 ( PnP Mode) 99, 98 96-94, 55-57, 66, 58 I/O Interrupt 3, 4, 5, 6, 7, 9, 10, 11, 12, and 15.
2- 84 Service Guide Table 2-14 NS87336VJG Pin Descriptions (continued) Pin No. I/O Description /MSEN0 /MSEN1 (Normal Mode) 50, 49 I Media Sense. These pins are Media Sense input pins when bit 0 of FCR is 0. Each pin has a 10 K Ω internal pull-up resistor.
Major Chips Description 2- 85 Table 2-14 NS87336VJG Pin Descriptions (continued) Pin No. I/O Description /RI1 /RI2 68, 60 I UARTs Ring Indicator. When low, this indicates that a telephone ring signal has been received by the modem.
2- 86 Service Guide Table 2-14 NS87336VJG Pin Descriptions (continued) Pin No. I/O Description TC 4 I Terminal Count. Control signal from the DMA controller to indicate the termination of a DMA transfer. TC is accepted only when FDACK is active. TC is active high in PC-AT and Model 30 modes, and active low in PS/2 mode.
Major Chips Description 2- 87 2.8 Yamaha YMF715 Audio Chip YMF715-S (OPL3-SA3) is a single audio chip that integrates OPL3 and its DAC, 16 bit Sigma- delta CODEC, MPU401 MIDI interface, joystick with timer, and a 3D enhanced controller including all the analog components which is suitable for multi-media application.
2- 88 Service Guide 2.8.2 Pin Diagram Figure 2-17 YMF715 Block Diagram.
Major Chips Description 2- 89 2.8.3 Pin Descriptions Table 2-15 YMF715 Descriptions Pin name Pins I/O Type Size Function ISA bus interface: 36 pins D7-0 8 I/O TTL 24mA Data Bus Al 1-0 12 I TTL 2mA Add.
2- 90 Service Guide Table 2-15 YMF715 Descriptions (Continued) Pin name Pins I/O Type Size Function Multi-purpose Dins: 13 pins SEL2-0 3 I+ CMOS 2mA Refer to “ Multi-purpose pins” section MP9-0 l0.
Major Chips Description 2- 91 2.9 T62.062.C Battery Charger 2.9.1 Overview Ambit T62.062.C.00 charger is designed exclusively for TI Extensa 610 notebook computer as a power management and battery charger module which can charge a 9 cells Nickel-Metal Hydride ( NiMH) or 9 cells with 3’s parallel and 3’s serial Lithium Ion(LIB) Battery pack.
2- 92 Service Guide • Max. T • Safety charging timer • Battery temperature constantly monitoring • Over voltage protect 13V • Providing low battery warning signals when the system using battery as the main power source 2.9.3 Absolute Maximum Ratings Table 2-16 T62.
Major Chips Description 2- 93 Table 2-17 T62.062.C Electrical Characteristics Table (Continued) Parameter Symbol Condition MIN TYP MAX UNITS OUTPUT AC Source input Signal (Voltage) (Supply current) AD5V AC source voltage > 8V 4.5 5 5.25 10 V mA Battery in use (High) (Low) (Supply current) BAT-IN-USE# @I load=100uA 2.
2- 94 Service Guide Table 2-17 T62.062.C Electrical Characteristics Table (Continued) Parameter Symbol Condition MIN TYP MAX UNITS SAFETY OPERATION Over voltage protect by Software NiMH LiB_lon 16.2 13 V V Note 1: External Adapter: Voltage limit 20V1V with maximum 24V over voltage as well as over current protection.
Major Chips Description 2- 95 2.9.6 Pin Description Table 2-18 T62.062.C Pin Description table Item Pin Name I/O Description SAFETY OPERATION 1 DC_BAT_OUT O/P .
2- 96 Service Guide 2.9.7 Functions Description 2.9.7.1 Charge Function A. FOR NIMH BATTERY When the charger module charges a 9 cells NiMH battery, 0V and T/ t, max T and - v detentions will be used as the main methods to determine the full charged battery.
Major Chips Description 2- 97 When system on if Adapter not inserted and battery voltage lower than BL3 voltage , then system will be turned off by the charger module. In addition, when system sends a ‘disable’ signal to charger module, system will be turned off by the charger module immedietly.
2- 98 Service Guide 2.10 T62.061.C DC-DC Converter This compact, high efficiency DC/DC Converter features +5V, +3.3V, 2.35V/2.45V/2.9V/3.1V, +12V and +6V five outputs up to 22 watts. And it accepts input from 7V to 21V, suitable for 3 cells Lithium Ion or 10 cells NiMH battery input Pentium based Notebook PC.
Major Chips Description 2- 99 2.10.3 Specifications Input: • DC BATT_IN:7V-8V DC Output: • + 5V :Load :0~2A • +12V :Load :0~0.12A • The other conditions same as 2.2.1 Input: • DCBATT_IN :8V-21V DC Output: • +5V: Load : 0A-3.2A Regulation: +5%, -5% • Ripple : 50mV ( max) • Noise: 100mV ( max) • OVP: 6.
2- 100 Service Guide • +2.35V:(2.45V) Load : 0A-4.2A Regulation: +5%, -4% • Ripple : 50mA ( max) • Noise: 100mV ( max) • OVP: 3.3-5.0V • Short-circuit protection • Fuse protection • *Ripple( max)=75mV when regulate in IDLE mode • +12V : Load : 0A-0.
Major Chips Description 2- 101 Output filter capacitor The recommended value is 30uF/Amps TAN or OS-CON CAP. Efficiency: 90%(MIN) at 12V input and 5V/1.
2- 102 Service Guide 2.11 T62.064.C DC-AC Inverter (11.3") THIS IS A DC-AC INVERTER UNIT TO DRIVE BACKLIGHT CCFT FOR NOTEBOOK COMPUTERS Table 2-20 MAXIMUM RATINGS ITEM SYMBOL MIN MAX UNIT REMARK INPUT VOLTAGE Vin 7 22 V INPUT CURRENT Iin -- 0.6 A 2.
Major Chips Description 2- 103 Operation Conditions • OPERATING TEMPERATURE 0 TO +50 • OPERATING HUMIDITY 90% MAX. R.H • STORAGE TEMPERATURE 10 TO +85 • STORAGE HUMIDITY 90% MAX. R.H • MTBF 50000 HRS 2.11.2 Pin & Connector Assignment J1: 52103-1217 (MOLEX) Table 2-22 Pin Description PIN NO.
2- 104 Service Guide 2.11.3 Top Overlay Figure 2-20 T62.064.C DC-AC Inverter Top Overlay diagram 2.11.4 Bottom Overlay Figure 2-21 T62.064.C DC-AC Inverter Bottom Overlay diagram.
Major Chips Description 2- 105 2.12 T62.066.C DC-AC Inverter (12.1") This is a DC-AC inverter unit to drive Backlight CCFT for notebook computers Table 2-23 MAXIMUM RATINGS ITEM SYMBOL MIN MAX UNIT REMARK INPUT VOLTAGE Vin 7 21 V INPUT CURRENT Iin -- 0.
2- 106 Service Guide 2.12.2 Pin & Connector Assignment J1: 52103-1217 (MOLEX) Table 2-25 J1: 52103-1217 (MOLEX) Pin Description PIN NO. SYMBOL DESCRIPRION 1 DCBATTIN DC (7.0V ~ 21.0V) 2 GND POWER GND 3 CCFTON PWM SIGNAL FOR ON/OFF AND BRIGHTNESS CONTROL 4 DATA ID X24C02 DATA 5 +5.
Major Chips Description 2- 107 2.12.3 Top Overlay Figure 2-22 T62.066.C DC-AC Inverter Top Overlay diagram 2.12.4 Bottom Overlay Figure 2-23 T62.066.C DC-AC Inverter Bottom Overlay diagram.
C h a p t e r 3 C h a p t e r 3 BIOS Setup Information BIOS Setup Information 3- 1 The notebook has a BIOS setup utility that allows you to configure the notebook and its hardware settings. This chapter tells how to use the Setup utility and describes each parameter item in the setup screens.
3- 2 Service Guide 3.2 Entering Setup Press F2 during POST to enter Setup. The BIOS Utility main screen displays. Setup Utility Basic System Settings System Security Power Management Settings Load Set.
BIOS Setup Information 3- 3 • When you press Esc to exit the Setup utility, the following prompt appears: Do you want to save CMOS data? [Yes] [No] • Select [Yes] to save the changes you made to the configuration values or [No] to abandon the changes and retain the current values.
3- 4 Service Guide 3.3 Basic System Configuration Basic System Configuration has a one-page screen display illustrated below. Basic System Settings Date ----------------------- [Dec 06,1996] Time ----------------------- [10:00:00] Floppy Disk A -------------- [1.
BIOS Setup Information 3- 5 3.3.5 Memory Test The notebook can test main memory for errors when you turn it on. The default setting, [Disabled] , allows the notebook to bypass the memory test and speed up the self-test procedure. 3.3.6 Boot Display If you connect an external monitor, you can switch display between the LCD and the external display.
3- 6 Service Guide 3.4 System Security System Security Disk Drive Control Floppy Disk Drive ------------- [Normal] Hard Disk Drive --------------- [Normal] System Boot Drive ------------- [Drive A The.
BIOS Setup Information 3- 7 3.4.3 System Boot Drive Control This parameter determines which drive the notebook boots from when you turn it on. The following table lists the three possible settings. Table 3-4 System Boot Drive Control Settings Setting Description Drive A Then C (default) Notebook boots from floppy drive A.
3- 8 Service Guide 3.4.5 Serial Port 1 Base Address The serial port can accommodate a modem, serial mouse, serial printer, or other serial devices. The default setting for the serial port base address is 3F8h(IRQ 4) 1 .
BIOS Setup Information 3- 9 The default setting is [Standard and Bidirectional] . If you set EPP as the parallel port operation mode, do not use 3BCh as the parallel port base address; otherwise, I/O conflicts may occur.
3- 10 Service Guide 3.4.9 CardBus Support The notebook comes pre-installed with a Windows 95 version which has built-in support for CardBus. In this case, CardBus Support is not needed and set to [Disabled] . If in case you install an older version of Windows 95 which does not have built-in Cardbus driver support, you need to enable this parameter.
BIOS Setup Information 3- 11 3.5 Power Management Settings Besides accessing this screen from POST ( F2 ), you can also press Fn-F6 during runtime to access this section of Setup.
3- 12 Service Guide The valid values for this timer range from 1 to 15 minutes with default set at [1] . Select [Off] to disable the timer. 3.5.4 System Sleep Timer This parameter enables you to set a timeout period for the notebook to enter either standby or hibernation mode.
BIOS Setup Information 3- 13 3.5.9 Battery-low Warning Beep This parameter allows you to enable or disable the warning beep generated by the notebook when a battery-low condition occurs.
3- 14 Service Guide 3.6 System Information Reference If you access Setup during runtime ( Fn-F6 ), pressing PgDn after the Power Management Settings screen displays a summary of your notebook’s components and settings.
BIOS Setup Information 3- 15 Table 3-6 System Status Descriptions Item Description CPU ID Shows the processor type CPU Clock Shows the processor speed System memory Shows the total system memory Video.
3- 16 Service Guide 3.7 Load Setup Default Settings Selecting this option allows you to load all the default settings. The default settings are the values initially stored in CMOS RAM intended to provide high performance. If in the future, you change these settings, you can load the default settings again by selecting this option.
C h C h a p t a p t e r 4 e r 4 Disassembly and Unit Replacement Disassembly and Unit Replacement 4- 1 This chapter contains step-by-step procedures on how to disassemble the notebook computer for maintenance and troubleshooting.
4- 2 Service Guide 4.1 General Information 4.1.1 Before You Begin Before proceeding with the disassembly procedure, make sure that you do the following: 1. Turn off the power to the system and all peripherals. 2. Unplug the AC adapter a nd all power and signal cables from the system.
D isassembly and Unit Rep lacement 4- 3 4.1.2 Connector Types There are two kinds of connectors on the main board: • Connectors with no locks Unplug the cable by simply pulling out the cable from the connector. • Connectors with locks You can use a plastic stick to lock and unlock connectors with locks.
4- 4 Service Guide 4.1.3 Disassembly Sequence The disassembly procedure described in this manual is divided into four major sections: • Section 4.2: Replacing Memory • Section 4.3: Removing the hard disk drive • Section 4.4: Removing the keyboard • Section 4.
D isassembly and Unit Rep lacement 4- 5 Figure 4-3 Disassembly Sequence Flowchart.
4- 6 Service Guide 4.2 Replacing Memory Follow these steps to insert memory modules: 1. Turn the computer over to access the base. 2. Remove the screw from the memory expansion door and remove the door. The memory door screw is part of the memory door and does not separate from the memory door.
D isassembly and Unit Rep lacement 4- 7 5. Replace the memory expansion door and screw in place. Sleep Manager must be run after installing additional memory for the computer to hibernate properly. If Sleep Manager is active, it will automatically adjust the hibernation file on your notebook.
4- 8 Service Guide 3. You will see a tape handle attached to the hard disk drive. Pull out the hard disk drive using the tape handle. Be careful pulling the hard disk drive out. Make sure the connector of the hard disk drive transfer board doesn’t loosen while removing the hard disk drive.
D isassembly and Unit Rep lacement 4- 9 4.4 Removing the Keyboard Follow these steps to remove the keyboard: 1. Slide out (1) and pull up (2) the two display hinge covers on both sides of the notebook. Figure 4-8 Removing the Display Hinge Covers 2. Unplug the keyboard connectors (CN1 and CN2) from the keyboard connection board.
4- 10 Service Guide 4.5 Disassembling the Inside Frame Assembly This section discusses how to disassemble the housing, and during its course, includes removing and replacing of certain major components like the internal drive (CD-ROM or floppy), CPU and the main board.
D isassembly and Unit Rep lacement 4- 11 4.5.2 Removing the Internal Drive 1. Pull up and remove the FDD/CD module latches. 2. Unplug the internal drive cable (CN14/CN17 for CD-ROM or CN14 for FDD).
4- 12 Service Guide 4.5.3 Replacing the CPU The unique ZIF (zero insertion force) socket allows you to easily remove the CPU. Follow these steps to remove the CPU and install a replacement CPU.
D isassembly and Unit Rep lacement 4- 13 4.5.4 Removing the Display 1. Remove the two screws that secure the display cable to the motherboard. Then unplug the display cable. Figure 4-13 Unplugging the Display Cable 2. Remove the four display hinge screws.
4- 14 Service Guide 4.5.5 Detaching the Top Cover 1. Screws found on the lower case secure the top cover with the lower. However, you may not need to remove all six screws. Follow the discussion below for details. • If you only want to remove the top cover from the lower case, remove all screws except for the encircled ones in this figure below.
D isassembly and Unit Rep lacement 4- 15 2. Remove three screws near the display hinge screw holes and one screw near the PC card slots. Before you detached the top cover make sure that you unplug the cable for the CN19 (touch pad). Unsnap the top cover from the base assembly and set aside.
4- 16 Service Guide 4.5.6 Removing the Base Assembly Remove four screws that secure the inside frame assembly to the base assembly. Then detach the inside frame assembly from the base assembly.
D isassembly and Unit Rep lacement 4- 17 4.5.7 Removing the Motherboard 1. Remove the fan by (3) removing the sticker and (4) unplugging the fan cable (CN9). Figure 4-18 Removing the Fan When installing the fan, the fan hole should face the rear of the unit to draw thermal air out of the system.
4- 18 Service Guide 3. Unplug the battery connector board cable (CN18). Figure 4-20 Removing the Battery Connector Board 4. Unplug the (a) LCD cover switch cable (CN8) and (b) speaker cables (CN7 and CN10).
D isassembly and Unit Rep lacement 4- 19 5. Turn the unit over and remove the two screws that secure the Charger Board to the inside of the assembly frame. Then remove the board. Figure 4-22 Removing the Charger Board 6. Remove seven screws that secure the motherboard to the inside assembly frame.
4- 20 Service Guide 4.5.8 Disassembling the Motherboard REMOVING THE PC CARD SLOT UNIT The PC Card Connector Module is normally part of the motherboard spare part.
D isassembly and Unit Rep lacement 4- 21 4.5.9 Removing the Touchpad The touchpad is connected to the top cover. Follow these steps to remove the touchpad assembly: 1. Peel off the mylar. 2. Remove the three screws and disconnect the touchpad cable (J2), then remove the touchpad main sensor and connector unit.
4- 22 Service Guide 4.6 Disassembling the Display Follow these steps to disassemble the display: 1. Remove the oval LCD bumpers at the top of the display and the long bumper on the LCD hinge. Figure 4-27 Removing the LCD Bumpers 2. Remove five screws on the display bezel.
D isassembly and Unit Rep lacement 4- 23 3. Pull out and remove the display bezel by first pulling on the inside of the bezel sides and lower bezel area. Then pull up the top bezel area. 3 1 1 1 2 2 Figure 4-29 Removing the Display Bezel 4. Twist (1), then slide out (2) and remove the Hinge Cable Cover.
4- 24 Service Guide 5. Remove screws on the four sides of the display panel. Then gently fold b ack the foil around the display panel and unplug the inverter cable (J2). The encircled screw doesn’t exist in STN LCD model . Figure 4-31 Removing the LCD Panel 6.
D isassembly and Unit Rep lacement 4- 25 5. Remove the screws that secure the DC-AC Inverter Board to the display back cover and remove the inverter boards. Then unplug the display cable. Figure 4-33 Removing the DC-AC Inverter and LCD ID Inverter Boards 5.
A p A p p e n d p e n d i x A i x A Model Number Definition Model Number Definition A- 1 This appendix shows the model number definition of the notebook.
A- 2 Service Guide 370P XX - X X X Hard Disk 0: No Hard Disk 3:340MB A: 1GB 1: 120MB 5:520MB C:1.35GB 2: 200MB 8:810MB D:1.4GB B: 250MB 9:1.3GB E: 2.1GB LCD C :11.
A p p e n d i x B A p p e n d i x B Exploded View Diagram Exploded View Diagram B- 1 This appendix shows an exploded view diagram of the notebook..
B- 2 Service Guide.
Exploded View Diagram B- 3.
A p A p p e n d p e n d i x C i x C Spare Parts Spare Parts C- 1 This appendix lists the spare parts of the notebook TI EXTENSA 610. Table C-1 Spare Parts List PART NAME ACER P/N TI P/N Ref. Exploded View COMMENTS << MECHANICAL & MODULES >> 1 IC CHARGE (power supply charger bd) 05.
C- 2 Service Guide Table C1 Spare parts list (continued) PART NAME ACER P/N TI P/N Ref. Exploded View COMMENTS << DISPLAY COMMON PARTS >> 1 HINGE (L), SAE AN370, EXT 61X 34.46909.001 9813520-0001 2 HINGE ( R), EXT. 61X 34.46905.001 9811814-0001 3 MYLAR, LCD, 100MM, EXT 61X 40.
Spare Parts C- 3 Table C1 Spare parts list (continued) PART NAME ACER P/N TI P/N Ref. Exploded View COMMENTS << MAIN BD >> 1 IC CPU INTEL P54CSLM 120M 3.1V 01.IP54S.C0M 9811798-0001 2 IC CPU INTEL P54CSLM 150M 2.9V SPGA 01.IP54S.F0B 9815594-0001 3 IC CPU INTEL P55C (MMX) 150M 2.
C- 4 Service Guide Table C1 Spare parts list (continued) PART NAME ACER P/N TI P/N Ref. Exploded View COMMENTS KEYBOARDS KB-84 KEY KAS1901-0161R US 370 (US) 90.46907.001 9805728-0001 27 w/cable Keyboard(UK) 90.46907.00U 9805758-0002 27 w/cable Keyboard(Germany) 90.
Spare Parts C- 5 Table C1 Spare parts list (continued) PART NAME ACER P/N TI P/N Ref. Exploded View COMMENTS SERVICE KITS MISC. PARTS PACK 6M.48409.001 9815599-0001 1 SCREW LCD CAP(47.46901.001) * 10 PCS see above kit 2 CAP RUBBER(47.46917.001) * 10 PCS see above kit 3 CLIPPER CABLE(42.
C- 6 Service Guide Table C1 Spare parts list (continued) PART NAME ACER P/N TI P/N options Misc. EXT BTY CHARGER 91.48428.001 370P ONLY 91.48428.001 9811764-0001 EXT FLOPPY DRIVE 91.46905.002 370/370P 91.46905.002 9811765-0001 PS/2 CABLE 50.46812.001 50.
A p p e n d i x D A p p e n d i x D Schematics This appendix shows the schematic diagrams of the notebook..
Date: February 12, 1997 Sheet 1 of 25 Size Document Number REV A3 96149 SC Title 370P/J (CPU) TAIPEI TAIWAN R.O.C ACER 1 2 3 4 5 6 7 8 9 10 RP19 SRP10K $CACHE# $HLOCK# $AP $BUSCHK# $FRCMC# $FLUSH# $WBWT# $PEN# 3.3V 3.3V 1 2 R214 10KR3 $DC# $MIO# $WR# $CPURST $SMIACT# $CPUADS# $CPUSMI# $TCK $WBWT# $TRST# 2.
Date: February 12, 1997 Sheet 2 of 25 Size Document Number REV A3 96149 SC Title 370P/J (M1521 CPU TO PCI BRIDGE) TAIPEI TAIWAN R.O.C ACER 1 2 R103 33R3 DQ 1 CLK/CONV# 2 RST# 3 GND 4 VDD 8 THIGH 7 TLO.
Date: February 12, 1997 Sheet 3 of 25 Size Document Number REV A3 96149 SC Title 370P/J (M1521 PART2) TAIPEI TAIWAN R.O.C ACER 1 2 3 4 5 6 7 8 RP42 SRN10 RAS#1 RAS#2 RAS#2 RAS#1 4,8,17,20,21,24 6 AD[0.
Date: February 12, 1997 Sheet 4 of 25 Size Document Number REV A3 96149 SC Title 370P/J (M1523 PCI TO ISA & IDE CONTROLLER) TAIPEI TAIWAN R.O.C ACER 1 2 R88 10KR3 PULLL2 +5V TC SYSCLK BALE SBHE# S.
Date: February 12, 1997 Sheet 5 of 25 Size Document Number REV A3 96149 SC Title 370P/J (256KB CACHE) TAIPEI TAIWAN R.O.C ACER ADV# 83 ADSP# 84 ADSC# 85 CLK 89 CS1# 98 CS2 97 CS2# 92 WEA 93 WEB 94 WEC.
Date: February 12, 1997 Sheet 6 of 25 Size Document Number REV A3 96149 SC Title 370P/J (DIMM SOCKET) TAIPEI TAIWAN R.O.C ACER 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 .
Date: February 12, 1997 Sheet 7 of 25 Size Document Number REV A3 96149 SC Title 370P/J (CY2263 CLOCK GENERATOR) TAIPEI TAIWAN R.O.C ACER 1 2 R201 33R3 CLK4M 8 ## D 2 CLK 3 Q 5 Q 6 VCC 14 P R 4 GND 7 .
Date: February 12, 1997 Sheet 8 of 25 Size Document Number REV A3 96149 SC Title 370P/J (M7101 PMU) TAIPEI TAIWAN R.O.C ACER CLOSE TO U34 1 2 R107 47R3 9 8 1 4 1 0 7 U26C SSHC125 1 2 R122 470R3 $STPCLK# PLED# DISPLED# +5V 3.
Date: February 12, 1997 Sheet 9 of 25 Size Document Number REV A3 96149 SC Title 370P/J (RTC AND BIOS) TAIPEI TAIWAN R.O.C ACER 1 2 R9 10KR3 SD[0..7] IRQ8# IRQ8# SD[0.
Date: February 12, 1997 Sheet 10 of 25 Size Document Number REV A3 96149 SC Title 370P/J (KB CONTROLLER) TAIPEI TAIWAN R.O.C ACER +5V 8 1 2 3 4 8 7 6 5 SW2 KHS04 D Q 2 1 D Q 1 2 D Q 0 3 W R # 4 R D # .
Date: February 12, 1997 Sheet 11 of 25 Size Document Number REV A3 96149 SC Title 370P/J (NS87336 SUPER I/O) TAIPEI TAIWAN R.O.C ACER C161 SCD1U C162 SCD1U PSOUT1 PRTS1# PDTR1# PSIN1 PDSR1# PCTS1# PRI.
Date: February 12, 1997 Sheet 12 of 25 Size Document Number REV A3 96149 SC Title 370P/J (||PORT,SERIAL PORT,EXT. FDD) TAIPEI TAIWAN R.O.C ACER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 27 26 CN3 PRNT25-4-D C142 SC150P C134 SC150P C135 SC150P C136 SC150P C137 SC150P C138 SC150P C139 SC150P C140 SC150P C141 SC150P PD[0.
Date: February 12, 1997 Sheet 13 of 25 Size Document Number REV A3 96149 SC Title 370P/J (GOLDEN FINGER I/F) TAIPEI TAIWAN R.O.C ACER 1 2 3 4 5 6 7 8 9 10 RP49 SRP10K 1 2 3 4 5 6 7 8 9 10 RP2 SRP4K7 D.
Date: February 12, 1997 Sheet 14 of 25 Size Document Number REV A3 96149 SC Title 370P/J (IDE & CD-ROM & FDD CONN) TAIPEI TAIWAN R.O.C ACER PCIRST# IDE_D4 IDE_D5 IDE_D6 IDE_D7 24 CDROM+5V 1 3 .
Date: January 27, 1997 Sheet 15 of 25 Size Document Number REV A3 96149 SC Title 370P/J (AUDIO YMF-715) TAIPEI TAIWAN R.O.C ACER 1 2 R72 220KR3 C216 SC1U16V5JX C75 SC1U16V5JX CD_R CD_L +7V AUD_GND 1 2.
Date: February 12, 1997 Sheet 16 of 25 Size Document Number REV A3 96149 SC Title 370P/J (AUDIO AMP & CONN) TAIPEI TAIWAN R.O.C ACER 12 13 11 1 4 7 U25D SSHC00 BBT_QCHG CHARGELED BBT_QCHG 5VSB_DC .
Date: February 12, 1997 Sheet 17 of 25 Size Document Number REV A3 96149 SC Title 370P/J (VGA CT65550) TAIPEI TAIWAN R.O.C ACER 1 2 3 4 5 6 7 8 RP11 SRN33 1 2 3 4 5 6 7 8 RP10 SRN33 VRAMOE# VCASAL# VCASAH# VWEA# VRASA# 18 18 18 18 C228 SCD1U PRASA# PCASAH# PCASAL# PWEA# VGAPWR VRAMVCC CVCC0 CVCC1 +5V 3.
Date: January 27, 1997 Sheet 18 of 25 Size Document Number REV A3 96149 SC Title 370P/J (VRAM & VGA BYPASS CAPACITOR) TAIPEI TAIWAN R.O.C ACER VMAD10 VMAD11 VMAD12 VMAD13 VMAD14 VMAD15 VCC 1 DQ0 2 DQ1 3 DQ2 4 DQ3 5 VCC 6 DQ4 7 DQ5 8 DQ6 9 DQ7 10 N.
Date: February 12, 1997 Sheet 19 of 25 Size Document Number REV A3 96149 SC Title 370P/J (CRT CONN.& ZV PORT) TAIPEI TAIWAN R.O.C ACER ZV_PCLK ZV_VREF A_WP UV7 A_A25 A_A10 A_A11 21 17 17 VCC 24 B0.
Date: February 12, 1997 Sheet 20 of 25 Size Document Number REV A3 96149 SC Title 370P/J (LCD I/F) TAIPEI TAIWAN R.O.C ACER CRT_R CRT_G CRT_B 19 19 19 1 2 L9 NL322522T-2R2 1 2 L10 NL322522T-2R2 1 2 L1.
Date: February 12, 1997 Sheet 21 of 25 Size Document Number REV A3 96149 SC Title 370P/J (PCI1131 CARD BUS CONTROLLER) TAIPEI TAIWAN R.O.C ACER C188 SCD1U C202 SCD1U C214 SCD1U C209 SC10U16V C190 SCD1U C34 SCD1U C35 SC10U16V C37 SC1KP C198 SC1KP 1 2 R151 0R3 INTD# 1130_INTB# INTD# 3.
Date: February 12, 1997 Sheet 22 of 25 Size Document Number REV A3 96149 SC Title 370P/J (PCMCIA SOCKET) TAIPEI TAIWAN R.O.C ACER B_D[0..15] B_A[0..25] B_CD1# B_CD1# B_D[0.
Date: February 12, 1997 Sheet 23 of 25 Size Document Number REV A3 96149 SC Title 370P/J (CHARGER,DC/DC) TAIPEI TAIWAN R.O.C ACER 1 2 R31 1KR3 DCBATOUT +5V BT_QCHG CX19 SCD1U 5VSB_DC 1 3 5 7 9 11 13 1.
Date: February 12, 1997 Sheet 24 of 25 Size Document Number REV A3 96149 SC Title 370P/J (H/W JUMPER SETTING) TAIPEI TAIWAN R.O.C ACER ALADDIN III PULL L: 5V suspend mode enable. PULL H: 5V suspend mode disable. L: DMA DACK[7:5,3:0] polling enable. H: DMA DACK[7:5,3:0] polling disable.
Date: January 27, 1997 Sheet 25 of 25 Size Document Number REV A3 96149 SC Title 370P/J (BYPASS CAPACITORS) TAIPEI TAIWAN R.O.C ACER C240 SCD1U C213 SCD1U C232 SCD1U M1521 C108 SCD1U 3.
A p A p p e n d p e n d i x E i x E BIOS POST Checkpoints BIOS POST Checkpoints E- 1 This appendix lists the POST checkpoints of the notebook BIOS. Table E-1 POST Checkpoint List Checkpoint Descriptio.
E- 2 Service Guide Table E-1 POST Checkpoint List (Continued) Checkpoint Description 2Ch • 128K base memory testing • Set default SS:SP= 0:400 Note: The 128K base memory area is tested for POST execution. The remaining memory area is tested later.
BIOS POST Checkpoints E- 3 Table E-1 POST Checkpoint List (Continued) Checkpoint Description 7Ch • Reset pointing device • Check pointing device 70h • Parallel port testing 74h • Serial port t.
デバイスAcer 61Xの購入後に（又は購入する前であっても）重要なポイントは、説明書をよく読むことです。その単純な理由はいくつかあります：
Acer 61Xをまだ購入していないなら、この製品の基本情報を理解する良い機会です。まずは上にある説明書の最初のページをご覧ください。そこにはAcer 61Xの技術情報の概要が記載されているはずです。デバイスがあなたのニーズを満たすかどうかは、ここで確認しましょう。Acer 61Xの取扱説明書の次のページをよく読むことにより、製品の全機能やその取り扱いに関する情報を知ることができます。Acer 61Xで得られた情報は、きっとあなたの購入の決断を手助けしてくれることでしょう。
Acer 61Xを既にお持ちだが、まだ読んでいない場合は、上記の理由によりそれを行うべきです。そうすることにより機能を適切に使用しているか、又はAcer 61Xの不適切な取り扱いによりその寿命を短くする危険を犯していないかどうかを知ることができます。
ですが、ユーザガイドが果たす重要な役割の一つは、Acer 61Xに関する問題の解決を支援することです。そこにはほとんどの場合、トラブルシューティング、すなわちAcer 61Xデバイスで最もよく起こりうる故障・不良とそれらの対処法についてのアドバイスを見つけることができるはずです。たとえ問題を解決できなかった場合でも、説明書にはカスタマー・サービスセンター又は最寄りのサービスセンターへの問い合わせ先等、次の対処法についての指示があるはずです。
