Texas InstrumentsメーカーTNETX4090の使用説明書/サービス説明書
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TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Single-Chip 100-/1000-Mbi.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description (continued) Switching Engine (Queue Manager) Rambus DRAM Controller VLAN 802.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PCS Duplex LED 45 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 GGP P ACKAGE (BOTTOM VIEW.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T able 1. Signal-to-Ball Mapping (Signal Names Sorted Alphabetically) SIGNAL NAME BALL NO.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T able 2. Signal-to-Ball Mapping (Signal Names Sorted Alphabetically) (Continued) SIGNAL NAME BALL NO.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T erminal Functions JT AG interface TERMINAL I/O INTERNAL DESCRIPTION NAME NO.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T erminal Functions (Continued) 100-/1000-Mbit/s MAC interface (GMII mode) TERMINAL NAME I/O INTERNAL RESISTOR † DESCRIPTION M08_COL I Pulldown Collision sense.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T erminal Functions (Cont.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T erminal Functions (Con.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 11 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T erminal Functions (Con.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T erminal Functions (Continued) 10-/100-Mbit/s MAC interface (MII mode) (ports 0–7) (continued) TERMINAL I/O INTERNAL DESCRIPTION NAME NO.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 13 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T erminal Functions (Continued) 10-/100-Mbit/s MAC interface (MII mode) (ports 0–7) (continued) TERMINAL I/O INTERNAL DESCRIPTION NAME NO.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T erminal Functions (Continued) 10-/100-Mbit/s MAC interface (MII mode) (ports 0–7) (continued) TERMINAL I/O INTERNAL DESCRIPTION NAME NO.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 15 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T erminal Functions (Continued) RDRAM interface TERMINAL I/O INTERNAL DESCRIPTION NAME NO.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T erminal Functions (Continued) DIO interface TERMINAL I/O INTERNAL DESCRIPTION NAME NO.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 17 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T erminal Functions (Continued) LED interface TERMINAL I/O INTERNAL DESCRIPTION NAME NO.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DIO interface description The DIO is a general-purpose interface that is used with a range of microprocessor or computer system interfaces.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 19 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T able 2.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T able 2.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 21 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T able 2.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T able 2.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 23 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T able 2.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DIO interface description (continued) T able 3 and T able 4 list the least significant byte address for the port-specific statistics.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 25 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T able 3.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T able 4.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 27 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DIO interface description (continued) T able 5. Address-Lookup Statistics PORT NO.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 state of DIO signal term.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 29 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 frame format on the NM port (continued) T o provide a CRC word, which includes the header , the NM port generates a new CRC word as the frame is being read out.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 30 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 frame format on the NM port (continued) Any device reading frames out of the NM port must expect frames to be in the format shown in Figure 2.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 31 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 full-duplex NM port The NM port can intermix reception and transmission as desired.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 32 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MAC interface receive control Data received from the PHYs is interpreted and assembled into the TNETX4090 buffer memory .
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 33 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 adaptive performance optimization (APO) Each Ethernet MAC incorporates APO logic.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 34 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 10-/100-Mbit/s MII (port.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 35 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Reserved Reserved Reserv.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 36 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 100-/1000-Mbit/s PHY interface (port 8) This port is controlled by an IEEE Std 802.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 37 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 speed, duplex, and flow-.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 38 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 pretagging and extended .
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 39 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T able 10. T ransmit Pretag Bit Definitions BIT NAME FUNCTION 31–28 reserved Reserved.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 40 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T able 12. Directed Format Receive Pretag Bit Definitions BIT NAME FUNCTION 31 1 One.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 41 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ring-cascade topology (continued) Frames received on a ring port must have an out-of-band pretag in the clock cycle before Mxx_RXDV is asserted.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 42 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 EEPROM interface The EEPROM interface is provided so the system-level manufacturer can produce a CPU-less preconfigured system.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 43 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 EEPROM interface (contin.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 44 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 compatibility with futur.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 45 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 T able 17. LED Status Bit Definitions and Shift Order ORDER NAME FUNCTION slast = 0 slast = 1 NAME FUNCTION 1st–12th 1 1th–22nd SW0–SW1 1 Software LEDs 0–1 1.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 46 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TNETX4090 9 DBUS_DA T A8.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 47 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 JT AG interface The TNETX4090 is fully IEEE Std 1 149.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 48 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 frame routing VLAN support The internal routing engine supports the IEEE Std 802.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 49 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IEEE Std 802.1Q tags – reception By the time the IALE examines the received frame, it contains an IEEE Std 802.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 50 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 aging algorithms time-threshold aging When learning addresses, the IALE adds the address to the table and tags it with a time stamp.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 51 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Unknown Multicast Destination Start Known VLAN? Source Port = 1 in.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 52 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Source Port Security Vio.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 53 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 E Mirr Bit = 1? Remove: .
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 54 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 removal of source port Normally , the IALE does not route a frame to a port on which it was received.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 55 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 port trunking example This example shows how to set up the TNETX4090 to support two port trunks.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 56 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 flow control The TNETX4090 supports collision-based flow control for ports in half-duplex mode and IEEE Std 802.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 57 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 other flow-control mechanisms hardware flow control If a port were in MII or GMII mode and full duplex, normally , its Mxx_COL would not be needed.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 58 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 reading RDRAM Reading from RDRAM memory is accomplished as follows: 1. Write the byte address for the access to ramaddress in RAMAddress.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 59 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 internal wrap test (continued) TNETX4090 08 07 06 05 04 03 02 01 00 NM Figure 13.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 60 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) † Supply voltage range, V DD(2.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 61 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristi.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 62 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 physical medium attachment interface (port 8) receive PMA receive (see Figure 16) NO.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 63 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 transmit PMA transmit (see Figure 17) NO.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 64 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 GMII (port 8) Figures 18–20 show the timing for the 100-/1000-Mbit/s GMII when operating at 1000 Mbit/s.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 65 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PMA and GMII clock (see Figure 20) NO. MIN MAX UNIT 1 t r(Mxx_GCLK) Pulse width low , Mxx_RFCLK 2.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 66 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MII (ports 0–8) Figures 21–23 show the timing for the eight MIIs operating at either 10-Mbit/s or 100-Mbit/s, and the GMII operating at 100-Mbit/s.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 67 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MII transmit (see Figure 22) NO.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 68 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 RDRAM interface RDRAM (see Figure 24) NO. MIN MAX UNIT 1 t c(DX_CLK) Cycle time DTX_CLK, DRX_CLK 3.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 69 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DIO interface The DIO interface is simple and asynchronous to allow easy adaptation to a range of microprocessor devices and computer system interfaces.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 70 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DIO and DMA reads (see Figure 26) NO.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 71 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 EEPROM interface For further information on EEPROM interface timing, refer to the 24C02 or 24C08 serial EEPROM data sheets.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 72 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 LED interface LED (see Figure 29) NO.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 73 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 P ARAMETER MEASUREMENT INFORMA TION The following load circuits and voltage waveforms show the conditions used for measuring switching characteristics.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 74 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 P ARAMETER MEASUREMENT I.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 75 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 P ARAMETER MEASUREMENT INFORMA TION V DD 0 20% 47% 80% Input (active-low enable) Hi-Z Active V OH Hi-Z (forced low) 50% L VCMOS 1.
TNETX4090 ThunderSWITCH II 9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 76 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DA T A GGP (S.
PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) TNETX4090GGP OBSOLETE BGA GGP 352 TBD Call TI Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.
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Texas Instruments TNETX4090をまだ購入していないなら、この製品の基本情報を理解する良い機会です。まずは上にある説明書の最初のページをご覧ください。そこにはTexas Instruments TNETX4090の技術情報の概要が記載されているはずです。デバイスがあなたのニーズを満たすかどうかは、ここで確認しましょう。Texas Instruments TNETX4090の取扱説明書の次のページをよく読むことにより、製品の全機能やその取り扱いに関する情報を知ることができます。Texas Instruments TNETX4090で得られた情報は、きっとあなたの購入の決断を手助けしてくれることでしょう。
Texas Instruments TNETX4090を既にお持ちだが、まだ読んでいない場合は、上記の理由によりそれを行うべきです。そうすることにより機能を適切に使用しているか、又はTexas Instruments TNETX4090の不適切な取り扱いによりその寿命を短くする危険を犯していないかどうかを知ることができます。
ですが、ユーザガイドが果たす重要な役割の一つは、Texas Instruments TNETX4090に関する問題の解決を支援することです。そこにはほとんどの場合、トラブルシューティング、すなわちTexas Instruments TNETX4090デバイスで最もよく起こりうる故障・不良とそれらの対処法についてのアドバイスを見つけることができるはずです。たとえ問題を解決できなかった場合でも、説明書にはカスタマー・サービスセンター又は最寄りのサービスセンターへの問い合わせ先等、次の対処法についての指示があるはずです。
