CypressメーカーCY14B104Nの使用説明書/サービス説明書
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CY14B104L, CY14B104N 4 Mbit (512K x 8/256K x 16) nvSRAM Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document #: 001-07102 Rev .
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 2 of 25 Pinout s Figure 1. Pin Diagram - 48 FBG A Figure 2. Pin Diag ram - 44 Pin TSOP II WE V CC A 11 A 10 V CAP A 6 A 0 A 3 CE NC NC DQ 0 A 4.
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 3 of 25 Figure 3. Pin Diagram - 54 Pi n TSOP II (x16) Pin Definitions Pin Name IO T ype Description A 0 – A 18 Input Address Inputs Used to Select one of the 524,288 bytes of the nvSRAM for x8 Co nfiguration .
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 4 of 25 Device Operation The CY14B104L/CY1 4B104N nvSRAM is made up of two functional components paired in the same physical cell. They are an SRAM memory cell and a nonvola tile QuantumTrap cell.
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 5 of 25 Hardware RECALL (Power Up) During power up or after any low power condition (V CC <V SWITCH ), an internal RECALL re quest is latched. When V CC again exceeds the sense voltage of V SWITCH , a RECALL cycle is automatically initiated and takes t HRECALL to complete.
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 6 of 25 Preventing AutoStore The AutoS t ore function is disabled by initiating an AutoS tore disable sequence. A sequence of read ope rations is performed in a manner similar to the software STORE initiation.
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 7 of 25 Maximum Ratin gs Exceeding maximum ratings may impair the useful life of the device. These user guid elines are not tested. S torage T emperature ................ ................. –65 ° C to +150 ° C Maximum Accumulated Storage T ime At 150 ° C Ambient T emperature .
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 8 of 25 AC T est Conditions Input Pulse Levels .... ............................ .................... 0V to 3V Input Rise and Fall T imes (10% - 90%).................... .... < 3 ns Input and Output T iming Reference Levels .
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 9 of 25 AC Switching Characteristics Parameters Descr iption 20 ns 25 ns 45 ns Unit Cypress Parameters Alt Parameters Min Max Min Ma x Min Max .
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 10 of 25 Figure 7. SRAM Rea d Cycle #2: CE and OE Controlle d [3, 14, 18] Figure 8. SRAM Write Cycle #1: WE Controlled [3, 17, 18, 19] $GGUHVV.
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 1 1 of 25 Figure 9. SRAM Write Cycle #2: CE Controlled [3 , 17, 18, 19] Figure 10. SRAM Write Cycle #3: BHE and BLE Controlled [3, 17, 18, 19] .
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 12 of 25 AutoStore/Power Up RECALL Parameters Description CY14B104L/CY14B1 04N Unit Min Max t HRECALL [20] Power Up RECALL Duration 20 ms t STORE [21] ST ORE Cycle Duration 8 ms t DELA Y [22] Time Allowed to Complete SRAM Cycle 1 70 μ s V SWITCH Low V oltage Trigger Level 2.
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 13 of 25 Sof tware Controlled STORE/RECALL Cycle In the following table, the so ftware c o ntrolled STORE/RECALL cycle p arameters are listed.
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 14 of 25 Hardware STORE Cycle Parameters Description CY14 B104L/CY14B104N Unit Min Max t PHSB Hardware ST ORE Pulse Width 15 ns t HLBL Hardware ST ORE LOW to STORE Busy 500 ns Switching W aveforms Figure 14.
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 15 of 25 T ruth T able For SRAM Operations HSB should remain HIGH for SRAM Operations. For x8 Configuration CE WE OE Inputs/Outputs [2 ] Mode P.
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 16 of 25 Ordering Information Speed (ns) Ordering Code Package Diagram Package T ype Operating Range 20 CY14B104L-ZS20XCT 51-85087 44-pin TSOP .
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 17 of 25 45 CY14B104L-ZS45XCT 51-85087 44-pin TSOP II Commercial CY14B104L-ZS45XIT 51-85087 44-pin TSOP II Industrial CY14B104L-ZS45XI 51-85087.
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 18 of 25 Part Numbering Nomenclature Option: T - T ape & Reel Blank - S td. S peed: 20 - 20 ns 25 - 25 ns Data Bus: L - x8 N - x16 Density: 104 - 4 Mb V oltage: B - 3.
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 19 of 25 Package Diagrams Figure 16. 44-Pin TSOP II (51-85087) MAX MIN. DIMENSION IN MM (INCH) 11.938 (0.470) PLANE SEATING PIN 1 I.D. 44 1 18.517 (0.729) 0.800 BSC 0° -5° 0.400(0.016) 0.300 (0.
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 20 of 25 Figure 17. 48 -Ball FBGA - 6 mm x 10 m m x 1.2 mm (51 -85128) Package Diagrams (continued) A 1 A1 CORNER 0.75 0.75 Ø0.30±0.05(48X) Ø0.25 M C A B Ø0.05 M C B A 0.15(4X) 0.21±0.05 1.
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 21 of 25 Figure 18. 54-Pin TSOP II (51-85160) Package Diagrams (continued) 51-85160 -** [+] Feedback.
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 22 of 25 Document History Page Document Title: CY14B104L/CY14B104N 4 Mbit (512K x 8/256K x 16) nvSRAM Document Number: 001-07102 Rev .
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 23 of 25 *F 1889928 See ECN vsutmp8/AE- SA Added Footnotes 1, 2 and 3. Updated logi c block diagram Added 48-FBGA (X8) Pin Dia gram Changed 8Mb Address expansion Pin from Pin 43 to Pin 42 for 44-TSOP II (x8).
CY14B104L, CY14B104N Document #: 001-07102 Rev . *L Page 24 of 25 *J 2600941 1 1/04/08 GVCH/PYRS Removed 15 n s access speed Updated Logi c block diagra m Updated footnote 1 Added footnote 2 and 5 Pin.
Document #: 001-07102 Rev . *L Revised December 19, 2008 Page 25 of 25 AutoS tore and QuantumT rap are registered tradem arks of Cypress Semico nductor Corpora tion. All product s and company names mentio ned in this document are th e trad emarks of the ir resp ectiv e holders.
デバイスCypress CY14B104Nの購入後に（又は購入する前であっても）重要なポイントは、説明書をよく読むことです。その単純な理由はいくつかあります：
Cypress CY14B104Nをまだ購入していないなら、この製品の基本情報を理解する良い機会です。まずは上にある説明書の最初のページをご覧ください。そこにはCypress CY14B104Nの技術情報の概要が記載されているはずです。デバイスがあなたのニーズを満たすかどうかは、ここで確認しましょう。Cypress CY14B104Nの取扱説明書の次のページをよく読むことにより、製品の全機能やその取り扱いに関する情報を知ることができます。Cypress CY14B104Nで得られた情報は、きっとあなたの購入の決断を手助けしてくれることでしょう。
Cypress CY14B104Nを既にお持ちだが、まだ読んでいない場合は、上記の理由によりそれを行うべきです。そうすることにより機能を適切に使用しているか、又はCypress CY14B104Nの不適切な取り扱いによりその寿命を短くする危険を犯していないかどうかを知ることができます。
ですが、ユーザガイドが果たす重要な役割の一つは、Cypress CY14B104Nに関する問題の解決を支援することです。そこにはほとんどの場合、トラブルシューティング、すなわちCypress CY14B104Nデバイスで最もよく起こりうる故障・不良とそれらの対処法についてのアドバイスを見つけることができるはずです。たとえ問題を解決できなかった場合でも、説明書にはカスタマー・サービスセンター又は最寄りのサービスセンターへの問い合わせ先等、次の対処法についての指示があるはずです。
