National InstrumentsメーカーHPC467064の使用説明書/サービス説明書
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TL/DD11046 HPC167064/HPC467064 High-Performance microController with a 16k UV Erasable CMOS EPROM PRELIMINARY August 1992 HPC167064/HPC467064 High-Performance microController with a 16k UV Erasable CMOS EPROM General Description The HPC167064 is a member of the HPC family of High Performance microControllers.
Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Total Allowable Source or Sink Current 100 mA Storage Temperature Range b 65 § Ct o a 150 § C Lead Temperature (Soldering, 10 sec.
20 MHz AC Electrical Characteristics (See Notes 1 and 4 and Figures 1 thru 5 ). V CC e 5V g 5% * ,T A eb 55 § Ct o a 125 § C for HPC167064 and V CC e 5V g 10%, T A e 0 § Ct o a 70 § C for HPC46706.
20 MHz AC Electrical Characteristics (Continued) (See Notes 1 and 4 and Figures 1 thru 5 .) V CC e 5V g 5% * ,T A eb 55 § Ct o a 125 § C for HPC167064 and V CC e 5V g 10%, T A e 0 § Ct o a 70 § C .
30 MHz AC Electrical Characteristics (See Notes 1 and 4 and Figures 1 thru 5 ). V CC e 5V g 10%, T A e 0 § Ct o a 70 § C for HPC467064. Symbol and Formula Parameter Min Max Units Notes f C CKI Operating Frequency 2 30 MHz t C1 e 1/f C CKI Clock Period 33 500 ns t CKIH CKI High Time 22.
30 MHz AC Electrical Characteristics (Continued) (See Notes 1 and 4 and Figures 1 thru 5 ). V CC e 5V g 10%, T A e 0 § Ct o a 70 § C for HPC467064. (Continued) Symbol and Formula Parameter Min Max U.
CKI Input Signal Characteristics TL/DD/11046 – 4 Note: AC testing inputs are driven at V IH for logic ‘‘1’’ and V IL for a logic ‘‘0’’. Output timing measurements are made at V CC /2 for both logic ‘‘1’’ and logic ‘‘0’’.
Timing Waveforms (Continued) TL/DD/11046 – 7 FIGURE 5. Read Cycle TL/DD/11046 – 8 FIGURE 6. Ready Mode Timing TL/DD/11046 – 9 FIGURE 7. Hold Mode Timing 8.
Timing Waveforms (Continued) TL/DD/11046 – 10 FIGURE 8. MICROWIRE Setup/Hold Timing TL/DD/11046 – 11 FIGURE 9. UPI Read Timing TL/DD/11046 – 12 FIGURE 10.
Functional Modes of Operation There are two primary functional modes of operation for the HPC167064. # EPROM Mode # Normal Running Mode EPROM MODE In the EPROM mode, the HPC167064 is configured to ‘‘ap- proximately emulate’’ a standard NMC27C256 EPROM.
Functional Modes of Operation (Continued) Security Level 2 This security level prevents programming of the on-chip EPROM or the ECON registers thereby providing WRITE protection. Read accesses to the on-chip EPROM or ECON registers may be accomplished without constraint in EPROM.
Pin Descriptions The HPC167064 is available only in 68-pin LDCC package. I/O PORTS Port A is a 16-bit bidirectional I/O port with a data direction register to enable each separate pin to be individually de- fined as an input or output. When accessing external memo- ry, port A is used as the multiplexed address/data bus.
Connection Diagram TL/DD/11046 – 17 Top View Order Number HPC167064, EL See NS Package Number EL68C Port sA&B The highly flexible A and B ports are similarly structured. The Port A (see Figure 11 ), consists of a data register and a direction register.
Port sA&B (Continued) TL/DD/11046 – 20 FIGURE 12. Structure of Port B Pins B0, B1, B2, B5, B6 and B7 (Typical Pins) TL/DD/11046 – 21 FIGURE 13.
Port sA&B (Continued) TL/DD/11046 – 22 FIGURE 14. Structure of Port B Pins B10, B11, B12 and B15 (Pins with Bus Control Roles) Operating Modes To offer the user a variety of I/O and expanded memory options, the HPC167064 has four operating modes.
HPC167064 Operating Modes SINGLE CHIP NORMAL MODE In this mode, the HPC167064 functions as a self-contained microcomputer (see Figure 15 ) with all memory (RAM and EPROM) on-chip. It can address internal memory only, con- sisting of 16 kbytes of EPROM (C000 to FFFF) and 512 bytes of on-chip RAM and Registers (0000 to 02FF).
HPC167064 Interrupts (Continued) TL/DD/11046 – 24 FIGURE 16. 8-Bit External Memory TL/DD/11046 – 25 FIGURE 17. 16-Bit External Memory 17.
HPC167064 Interrupts (Continued) TABLE II. Interrupts Vector Interrupt Source Arbitration Address Ranking FFFF:FFFE RESET 0 FFFD:FFFC Nonmaskable external on rising edge of I1 pin 1 FFFB:FFFA External.
TL/DD/11046 – 26 FIGURE 18. Block Diagram of Interrupt Logic 19.
Timer Overview (Continued) (Clock Input/16) rate. It is used for WATCHDOG logic, high speed event capture, and to exit from the IDLE mode. Con- sequently, it cannot be stopped or written to under software control. Timer T0 permits precise measurements by means of the capture registers I2CR, I3CR, and I4CR.
Timer Overview (Continued) Maximum output frequency for any timer output can be ob- tained by setting timer/register pair to zero. This then will produce an output frequency equal to (/2 the frequency of the source used for clocking the timer. Timer Registers There are four control registers that program the timers.
MICROWIRE/PLUS Application Figure 25 illustrates a MICROWIRE/PLUS arrangement for an automotive application. The microcontroller-based sys- tem could be used to interface to an instrument cluster and various parts of the automobile. The diagram shows two HPC167064 microcontrollers interconnected to other MICROWIRE peripherals.
HPC167064 UART The HPC167064 contains a software programmable UART. The UART (see Figure 26 ) consists of a transmit shift regis- ter, a receiver shift register and five addressable registers, as foll.
Universal Peripheral Interface The Universal Peripheral Interface (UPI) allows the HPC167064 to be used as an intelligent peripheral to anoth- er processor. The UPI could thus be used to tightly link two HPC167064’s and set up systems with very high data ex- change rates.
Shared Memory Support (Continued) TL/DD/11046 – 36 FIGURE 28. Shared Memory Application (HPC167064 Interface to Series 32000 System) Design Considerations TABLE III.
Design Considerations (Continued) TABLE IV. Memory Map of HPC167064 Emulating an HPC16083 FFFF:FFF0 Interrupt Vectors FFEF:FFD0 JSRP Vectors FFCF:FFCE : : On-Chip EPROM E001:E000 ( User Memory DFFF:DF.
Design Considerations (Continued) Designs using the HPC family of 16-bit high speed CMOS microcontrollers need to follow some general guidelines on usage and board layout. Floating inputs are a frequently overlooked problem. CMOS inputs have extremely high impedance and, if left open, can float to any voltage.
HPC167064 CPU The HPC167064 CPU has a 16-bit ALU and six 16-bit regis- ters. Arithmetic Logic Unit (ALU) The ALU is 16 bits wide and can do 16-bit add, subtract and shift or logic AND, OR and exclusive OR in one timing cycle. The ALU can also output the carry bit to a 1-bit C register.
HPC Instruction Set Description (Continued) Mnemonic Description Action BIT INSTRUCTIONS SBIT Set bit 1 x Mem.bit RBIT Reset bit 0 x Mem.bit IFBIT If bit If Mem.
Code Efficiency One of the most important criteria of a single chip microcon- troller is code efficiency. The more efficient the code, the more features that can be put on a chip.
Development Support (Continued) PROGRAMMING SUPPORT The HPC167064 EPROM array can be programmed using a DATA I/O Unisite model with a pinsite module. No adaptor board is required with the DATA I/O programmer. Program- ming of the configuration bytes and security bits is de- scribed in the HPC Family User’s Manual.
Part Selection The HPC family includes devices with many different options and configurations to meet various application needs. The number HPC167064 has been generically used throughout this datasheet to represent the whole family of parts. The following chart explains how to order various options available when ordering HPC family members.
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HPC167064/HPC467064 High-Performance microController with a 16k UV Erasable CMOS EPROM Physical Dimensions inches (millimeters) Leaded EPROM Chip Carrier (EL) Order Number HPC167064EL or HPC467064EL N.
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